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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id w1si2327806wjx.198.2014.04.03.06.56.29 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 03 Apr 2014 06:56:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::1 as permitted sender) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1WVi84-00039B-OO; Thu, 03 Apr 2014 14:56:28 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Rob Herring Subject: [for-2.0 1/2] hw/arm/highbank: Don't segfault on unknown CPU names Date: Thu, 3 Apr 2014 14:56:27 +0100 Message-Id: <1396533388-12069-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1396533388-12069-1-git-send-email-peter.maydell@linaro.org> References: <1396533388-12069-1-git-send-email-peter.maydell@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.182 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , If the user passes an unknown CPU name via the '-cpu' option, exit with an error message rather than segfaulting. Signed-off-by: Peter Maydell --- hw/arm/highbank.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index f66d57b..03545aa 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -233,6 +233,11 @@ static void calxeda_init(QEMUMachineInitArgs *args, enum cxmachines machine) ARMCPU *cpu; Error *err = NULL; + if (!oc) { + fprintf(stderr, "Unable to find CPU definition\n"); + exit(1); + } + cpu = ARM_CPU(object_new(object_class_get_name(oc))); object_property_set_int(OBJECT(cpu), MPCORE_PERIPHBASE, "reset-cbar",