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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id ff3si7560711pad.214.2014.03.17.09.00.43 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 17 Mar 2014 09:00:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::1 as permitted sender) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1WPZxx-0004vr-Ak; Mon, 17 Mar 2014 16:00:41 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, qemu-trivial@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH v2 06/12] hw/usb/hcd-ohci.c: Avoid shifting left into sign bit Date: Mon, 17 Mar 2014 16:00:35 +0000 Message-Id: <1395072041-18911-7-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1395072041-18911-1-git-send-email-peter.maydell@linaro.org> References: <1395072041-18911-1-git-send-email-peter.maydell@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.181 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add U suffix to avoid undefined behaviour. This is only strictly necessary for the 1<<31 cases, but we add it for the other constants in these groups for consistency. Signed-off-by: Peter Maydell --- hw/usb/hcd-ohci.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index 3d35058b..93f186f 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -234,15 +234,15 @@ struct ohci_iso_td { #define OHCI_STATUS_OCR (1<<3) #define OHCI_STATUS_SOC ((1<<6)|(1<<7)) -#define OHCI_INTR_SO (1<<0) /* Scheduling overrun */ -#define OHCI_INTR_WD (1<<1) /* HcDoneHead writeback */ -#define OHCI_INTR_SF (1<<2) /* Start of frame */ -#define OHCI_INTR_RD (1<<3) /* Resume detect */ -#define OHCI_INTR_UE (1<<4) /* Unrecoverable error */ -#define OHCI_INTR_FNO (1<<5) /* Frame number overflow */ -#define OHCI_INTR_RHSC (1<<6) /* Root hub status change */ -#define OHCI_INTR_OC (1<<30) /* Ownership change */ -#define OHCI_INTR_MIE (1<<31) /* Master Interrupt Enable */ +#define OHCI_INTR_SO (1U<<0) /* Scheduling overrun */ +#define OHCI_INTR_WD (1U<<1) /* HcDoneHead writeback */ +#define OHCI_INTR_SF (1U<<2) /* Start of frame */ +#define OHCI_INTR_RD (1U<<3) /* Resume detect */ +#define OHCI_INTR_UE (1U<<4) /* Unrecoverable error */ +#define OHCI_INTR_FNO (1U<<5) /* Frame number overflow */ +#define OHCI_INTR_RHSC (1U<<6) /* Root hub status change */ +#define OHCI_INTR_OC (1U<<30) /* Ownership change */ +#define OHCI_INTR_MIE (1U<<31) /* Master Interrupt Enable */ #define OHCI_HCCA_SIZE 0x100 #define OHCI_HCCA_MASK 0xffffff00 @@ -253,7 +253,7 @@ struct ohci_iso_td { #define OHCI_FMI_FSMPS 0xffff0000 #define OHCI_FMI_FIT 0x80000000 -#define OHCI_FR_RT (1<<31) +#define OHCI_FR_RT (1U<<31) #define OHCI_LS_THRESH 0x628 @@ -265,12 +265,12 @@ struct ohci_iso_td { #define OHCI_RHA_NOCP (1<<12) #define OHCI_RHA_POTPGT_MASK 0xff000000 -#define OHCI_RHS_LPS (1<<0) -#define OHCI_RHS_OCI (1<<1) -#define OHCI_RHS_DRWE (1<<15) -#define OHCI_RHS_LPSC (1<<16) -#define OHCI_RHS_OCIC (1<<17) -#define OHCI_RHS_CRWE (1<<31) +#define OHCI_RHS_LPS (1U<<0) +#define OHCI_RHS_OCI (1U<<1) +#define OHCI_RHS_DRWE (1U<<15) +#define OHCI_RHS_LPSC (1U<<16) +#define OHCI_RHS_OCIC (1U<<17) +#define OHCI_RHS_CRWE (1U<<31) #define OHCI_PORT_CCS (1<<0) #define OHCI_PORT_PES (1<<1)