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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id x3si14690950wje.119.2014.03.12.06.06.03 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Wed, 12 Mar 2014 06:06:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::1 as permitted sender) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1WNirB-000357-Eh; Wed, 12 Mar 2014 13:06:01 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Riku Voipio Subject: [PATCH 2/2] linux-user: Don't return uninitialized value for atomic_barrier syscall Date: Wed, 12 Mar 2014 13:06:01 +0000 Message-Id: <1394629561-11813-3-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1394629561-11813-1-git-send-email-peter.maydell@linaro.org> References: <1394629561-11813-1-git-send-email-peter.maydell@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.174 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , QEMU's implementation of the m68k atomic_barrier syscall, like the kernel's, is just a no-op. However we still need to return a result code from it. Signed-off-by: Peter Maydell --- linux-user/syscall.c | 1 + 1 file changed, 1 insertion(+) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index e2c10cc..19317eb 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -9142,6 +9142,7 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1, case TARGET_NR_atomic_barrier: { /* Like the kernel implementation and the qemu arm barrier, no-op this? */ + ret = 0; break; } #endif