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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id p8si36334124eew.174.2014.03.10.12.10.49 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 10 Mar 2014 12:10:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::1 as permitted sender) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1WN5b7-0002TZ-Ef; Mon, 10 Mar 2014 19:10:49 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, qemu-trivial@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 10/12] hw/intc/slavio_intctl: Avoid shifting left into sign bit Date: Mon, 10 Mar 2014 19:10:46 +0000 Message-Id: <1394478649-9453-11-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1394478649-9453-1-git-send-email-peter.maydell@linaro.org> References: <1394478649-9453-1-git-send-email-peter.maydell@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.170 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add 'U' suffix to avoid undefined behaviour. Signed-off-by: Peter Maydell --- hw/intc/slavio_intctl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/slavio_intctl.c b/hw/intc/slavio_intctl.c index 41a1672..b10fb66 100644 --- a/hw/intc/slavio_intctl.c +++ b/hw/intc/slavio_intctl.c @@ -272,7 +272,7 @@ static void slavio_check_interrupts(SLAVIO_INTCTLState *s, int set_irqs) CPU_IRQ_TIMER_IN; if (i == s->target_cpu) { for (j = 0; j < 32; j++) { - if ((s->intregm_pending & (1 << j)) && intbit_to_level[j]) { + if ((s->intregm_pending & (1U << j)) && intbit_to_level[j]) { s->slaves[i].intreg_pending |= 1 << intbit_to_level[j]; } }