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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id nr7si3367626bkb.159.2014.02.21.05.06.49 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 21 Feb 2014 05:06:49 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::1 as permitted sender) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1WGpoW-00049e-MG; Fri, 21 Feb 2014 13:06:48 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org Subject: [PATCH 2/4] hw/arm/omap1.c: Avoid shifting left into sign bit Date: Fri, 21 Feb 2014 13:06:46 +0000 Message-Id: <1392988008-15938-3-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1392988008-15938-1-git-send-email-peter.maydell@linaro.org> References: <1392988008-15938-1-git-send-email-peter.maydell@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add missing 'U' suffix to avoid shifting left into sign bit. Signed-off-by: Peter Maydell --- hw/arm/omap1.c | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 47511d2..b433748 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -809,22 +809,26 @@ static inline void omap_pin_funcmux1_update(struct omap_mpu_state_s *s, uint32_t diff, uint32_t value) { if (s->compat1509) { - if (diff & (1 << 31)) /* MCBSP3_CLK_HIZ_DI */ - omap_clk_onoff(omap_findclk(s, "mcbsp3.clkx"), - (value >> 31) & 1); - if (diff & (1 << 1)) /* CLK32K */ - omap_clk_onoff(omap_findclk(s, "clk32k_out"), - (~value >> 1) & 1); + if (diff & (1U << 31)) { + /* MCBSP3_CLK_HIZ_DI */ + omap_clk_onoff(omap_findclk(s, "mcbsp3.clkx"), (value >> 31) & 1); + } + if (diff & (1 << 1)) { + /* CLK32K */ + omap_clk_onoff(omap_findclk(s, "clk32k_out"), (~value >> 1) & 1); + } } } static inline void omap_pin_modconf1_update(struct omap_mpu_state_s *s, uint32_t diff, uint32_t value) { - if (diff & (1 << 31)) /* CONF_MOD_UART3_CLK_MODE_R */ - omap_clk_reparent(omap_findclk(s, "uart3_ck"), - omap_findclk(s, ((value >> 31) & 1) ? - "ck_48m" : "armper_ck")); + if (diff & (1U << 31)) { + /* CONF_MOD_UART3_CLK_MODE_R */ + omap_clk_reparent(omap_findclk(s, "uart3_ck"), + omap_findclk(s, ((value >> 31) & 1) ? + "ck_48m" : "armper_ck")); + } if (diff & (1 << 30)) /* CONF_MOD_UART2_CLK_MODE_R */ omap_clk_reparent(omap_findclk(s, "uart2_ck"), omap_findclk(s, ((value >> 30) & 1) ?