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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id g9si6033818wiz.23.2014.02.16.10.21.15 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Sun, 16 Feb 2014 10:21:18 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::1 as permitted sender) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1WF6L2-0007Tq-2a; Sun, 16 Feb 2014 18:21:12 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Alexander Graf , Michael Matz , Claudio Fontana , Dirk Mueller , Laurent Desnogues , kvmarm@lists.cs.columbia.edu, Richard Henderson , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Christoffer Dall , Will Newton , Peter Crosthwaite Subject: [PATCH 1/6] target-arm: A64: Add opcode comments to disas_simd_three_reg_diff Date: Sun, 16 Feb 2014 18:21:06 +0000 Message-Id: <1392574872-28725-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1392574872-28725-1-git-send-email-peter.maydell@linaro.org> References: <1392574872-28725-1-git-send-email-peter.maydell@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.178 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The opcode switch in disas_simd_three_reg_diff() is missing the customary comments indicating which cases correspond to which instructions. Add them. Signed-off-by: Peter Maydell --- target-arm/translate-a64.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 3de9cad..d4e7a20 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -7091,24 +7091,24 @@ static void disas_simd_three_reg_diff(DisasContext *s, uint32_t insn) /* 128 x 128 -> 64 */ unsupported_encoding(s, insn); break; - case 9: - case 11: - case 13: - case 14: + case 9: /* SQDMLAL, SQDMLAL2 */ + case 11: /* SQDMLSL, SQDMLSL2 */ + case 13: /* SQDMULL, SQDMULL2 */ + case 14: /* PMULL, PMULL2 */ if (is_u) { unallocated_encoding(s); return; } /* fall through */ - case 0: - case 2: + case 0: /* SADDL, SADDL2, UADDL, UADDL2 */ + case 2: /* SSUBL, SSUBL2, USUBL, USUBL2 */ unsupported_encoding(s, insn); break; - case 5: - case 7: - case 8: - case 10: - case 12: + case 5: /* SABAL, SABAL2, UABAL, UABAL2 */ + case 7: /* SABDL, SABDL2, UABDL, UABDL2 */ + case 8: /* SMLAL, SMLAL2, UMLAL, UMLAL2 */ + case 10: /* SMLSL, SMLSL2, UMLSL, UMLSL2 */ + case 12: /* SMULL, SMULL2, UMULL, UMULL2 */ /* 64 x 64 -> 128 */ if (size == 3) { unallocated_encoding(s);