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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id k3si2601714qcz.113.2014.02.15.08.08.27 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Sat, 15 Feb 2014 08:08:27 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:57156 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WEhn0-0003tj-Ne for patch@linaro.org; Sat, 15 Feb 2014 11:08:26 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52359) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WEhmC-0002w0-QT for qemu-devel@nongnu.org; Sat, 15 Feb 2014 11:07:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WEhmC-0003Q1-2U for qemu-devel@nongnu.org; Sat, 15 Feb 2014 11:07:36 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:45775) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WEhmB-0003OX-Rq for qemu-devel@nongnu.org; Sat, 15 Feb 2014 11:07:35 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1WEhm1-0006fG-1u; Sat, 15 Feb 2014 16:07:25 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Sat, 15 Feb 2014 16:07:00 +0000 Message-Id: <1392480444-25565-8-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1392480444-25565-1-git-send-email-peter.maydell@linaro.org> References: <1392480444-25565-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Cc: Rob Herring , Peter Crosthwaite , patches@linaro.org, Michael Matz , Alexander Graf , Claudio Fontana , Dirk Mueller , Will Newton , Laurent Desnogues , =?UTF-8?q?Alex=20Benn=C3=A9e?= , kvmarm@lists.cs.columbia.edu, Christoffer Dall , Richard Henderson Subject: [Qemu-devel] [PATCH v3 07/31] target-arm: Implement AArch64 dummy MDSCR_EL1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.176 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 We don't support letting the guest do debug, but Linux prods the monitor debug system control register anyway, so implement a dummy RAZ/WI version. Signed-off-by: Peter Maydell Reviewed-by: Peter Crosthwaite --- target-arm/helper.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target-arm/helper.c b/target-arm/helper.c index 8184c38..9be331b 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1656,6 +1656,12 @@ static const ARMCPRegInfo v8_cp_reginfo[] = { .opc0 = 1, .opc2 = 0, .crn = 8, .crm = 7, .opc2 = 7, .access = PL1_W, .type = ARM_CP_NO_MIGRATE, .writefn = tlbi_aa64_vaa_write }, + /* Dummy implementation of monitor debug system control register: + * we don't support debug. + */ + { .name = "MDSCR_EL1", .state = ARM_CP_STATE_AA64, + .opc0 = 2, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 2, + .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, REGINFO_SENTINEL };