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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id qm2si14614758bkb.305.2014.01.27.06.50.29 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 27 Jan 2014 06:50:29 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:59931 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W7nW8-0002LZ-5q for patch@linaro.org; Mon, 27 Jan 2014 09:50:28 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42986) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W7nV2-0000wr-T7 for qemu-devel@nongnu.org; Mon, 27 Jan 2014 09:49:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1W7nUy-0006Zw-7B for qemu-devel@nongnu.org; Mon, 27 Jan 2014 09:49:20 -0500 Received: from mx1.redhat.com ([209.132.183.28]:53539) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1W7nUx-0006Zi-Vq for qemu-devel@nongnu.org; Mon, 27 Jan 2014 09:49:16 -0500 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s0REnD03029941 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Mon, 27 Jan 2014 09:49:13 -0500 Received: from localhost (ovpn-112-61.ams2.redhat.com [10.36.112.61]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id s0REnBPY005857; Mon, 27 Jan 2014 09:49:12 -0500 From: Stefan Hajnoczi To: Date: Mon, 27 Jan 2014 15:48:48 +0100 Message-Id: <1390834129-19625-4-git-send-email-stefanha@redhat.com> In-Reply-To: <1390834129-19625-1-git-send-email-stefanha@redhat.com> References: <1390834129-19625-1-git-send-email-stefanha@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: Peter Maydell , Anthony Liguori Subject: [Qemu-devel] [PULL 3/4] Fix lan9118 buffer length handling X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: patch@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.51 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Roy Franz The 9118 ethernet controller supports transmission of multi-buffer packets with arbitrary byte alignment of the start and end bytes. All writes to the packet fifo are 32 bits, so the controller discards bytes at the beginning and end of each buffer based on the 'Data start offset' and 'Buffer size' of the TX command 'A' format. This patch uses the provided buffer length to limit the bytes transmitted. Previously all the bytes of the last 32-bit word written to the TX fifo were added to the internal transmit buffer structure resulting in more bytes being transmitted than were submitted to the hardware in the command. This resulted in extra bytes being inserted into the middle of multi-buffer packets when the non-final buffers had non-32bit aligned ending addresses. Signed-off-by: Roy Franz Reviewed-by: Peter Crosthwaite Signed-off-by: Stefan Hajnoczi --- hw/net/lan9118.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c index bb0c503..e528290 100644 --- a/hw/net/lan9118.c +++ b/hw/net/lan9118.c @@ -763,7 +763,7 @@ static void tx_fifo_push(lan9118_state *s, uint32_t val) if (s->txp->buffer_size <= 0 && s->txp->pad != 0) { s->txp->pad--; } else { - n = 4; + n = MIN(4, s->txp->buffer_size + s->txp->offset); while (s->txp->offset) { val >>= 8; n--;