From patchwork Sat Oct 19 17:04:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roy Franz X-Patchwork-Id: 21191 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ob0-f197.google.com (mail-ob0-f197.google.com [209.85.214.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 3DFCE244CA for ; Sat, 19 Oct 2013 17:04:49 +0000 (UTC) Received: by mail-ob0-f197.google.com with SMTP id vb8sf956341obc.4 for ; Sat, 19 Oct 2013 10:04:48 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=mime-version:x-gm-message-state:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=vqBSoWA0eTJfRpT3Geie/veRW9zQ9Ht/72+C5JcIyqA=; b=Oev/WlAOrxzzy5J0AqZJ7/87xUNxfOLIauZF+fb1fjtogH5BgYitrMdaZFCuE5WCRG GILNPYBTxPqS3O5As9eSrDe3XAEUKAZRaHdNRYnVp2pctOT+bBLJrKVBHUA0X62tH+e5 ND43xU8f0DDrVj0Kzakm+cvTKvd5haokCQGw9VgQ3pRZutgWSlQCz9FzptMxjilMyD33 eo+b8RMCnn6JBn0C11qwEWD7FTWATPLPW8AaH4hvCQMsqDgWVvC8ejblGtMSOMlp6DMy MyIb4VBc3NXEhxx0e5n9vIO6Lt4aSajXGydOsDEr5EmMRJy2q9aAPC+I6q2xguzIJq6G 02dA== X-Received: by 10.43.100.129 with SMTP id cw1mr334019icc.30.1382202287914; Sat, 19 Oct 2013 10:04:47 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.99.67 with SMTP id eo3ls1594489qeb.41.gmail; Sat, 19 Oct 2013 10:04:47 -0700 (PDT) X-Received: by 10.52.164.102 with SMTP id yp6mr5086809vdb.14.1382202287814; Sat, 19 Oct 2013 10:04:47 -0700 (PDT) Received: from mail-ve0-f177.google.com (mail-ve0-f177.google.com [209.85.128.177]) by mx.google.com with ESMTPS id s5si2024340vev.3.2013.10.19.10.04.46 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 19 Oct 2013 10:04:46 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.128.177 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.177; Received: by mail-ve0-f177.google.com with SMTP id oz11so2362180veb.22 for ; Sat, 19 Oct 2013 10:04:46 -0700 (PDT) X-Gm-Message-State: ALoCoQl3R2tiJUfAS4UMiiA9vPzjVXsbhOFeVjKw2Wp3DwjMO52VCPuj6+DBmrBDjKmOmK7gO1u9 X-Received: by 10.52.164.16 with SMTP id ym16mr121682vdb.39.1382202286062; Sat, 19 Oct 2013 10:04:46 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp43181vcz; Sat, 19 Oct 2013 10:04:45 -0700 (PDT) X-Received: by 10.68.169.161 with SMTP id af1mr9019475pbc.22.1382202284773; Sat, 19 Oct 2013 10:04:44 -0700 (PDT) Received: from mail-pb0-f43.google.com (mail-pb0-f43.google.com [209.85.160.43]) by mx.google.com with ESMTPS id io7si3710339pbc.59.2013.10.19.10.04.44 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 19 Oct 2013 10:04:44 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.160.43 is neither permitted nor denied by best guess record for domain of roy.franz@linaro.org) client-ip=209.85.160.43; Received: by mail-pb0-f43.google.com with SMTP id md4so5152464pbc.30 for ; Sat, 19 Oct 2013 10:04:44 -0700 (PDT) X-Received: by 10.68.48.166 with SMTP id m6mr8789360pbn.105.1382202284380; Sat, 19 Oct 2013 10:04:44 -0700 (PDT) Received: from rfranz-i7.local (c-98-244-40-86.hsd1.ca.comcast.net. [98.244.40.86]) by mx.google.com with ESMTPSA id va8sm9864513pbc.16.2013.10.19.10.04.43 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 19 Oct 2013 10:04:43 -0700 (PDT) From: Roy Franz To: qemu-devel@nongnu.org, kwolf@redhat.com, stefanha@redhat.com Cc: peter.maydell@linaro.org, patches@linaro.org, Roy Franz Subject: [PATCH 2/2 v3] block, arm: Set proper device-width for vexpress flash Date: Sat, 19 Oct 2013 10:04:34 -0700 Message-Id: <1382202274-8190-3-git-send-email-roy.franz@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1382202274-8190-1-git-send-email-roy.franz@linaro.org> References: <1382202274-8190-1-git-send-email-roy.franz@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: roy.franz@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.177 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Create vexpress specific pflash registration function which properly configures the device-width of 16 bits (2 bytes) for the NOR flash on the vexpress platform. This change is required for buffered flash writes to work properly. Signed-off-by: Roy Franz --- hw/arm/vexpress.c | 43 +++++++++++++++++++++++++++++++++---------- 1 file changed, 33 insertions(+), 10 deletions(-) diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index f48de00..8eae73c 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -480,6 +480,35 @@ static void vexpress_modify_dtb(const struct arm_boot_info *info, void *fdt) } } + +/* Open code a private version of pflash registration since we + * need to set non-default device width for VExpress platform. + */ +static pflash_t *ve_pflash_cfi01_register(hwaddr base, const char *name, + BlockDriverState *bs) +{ + DeviceState *dev = qdev_create(NULL, "cfi.pflash01"); + + if (bs && qdev_prop_set_drive(dev, "drive", bs)) { + abort(); + } + + qdev_prop_set_uint32(dev, "num-blocks", VEXPRESS_FLASH_SIZE / VEXPRESS_FLASH_SECT_SIZE); + qdev_prop_set_uint64(dev, "sector-length", VEXPRESS_FLASH_SECT_SIZE); + qdev_prop_set_uint8(dev, "width", 4); + qdev_prop_set_uint8(dev, "device-width", 2); + qdev_prop_set_uint8(dev, "big-endian", 0); + qdev_prop_set_uint16(dev, "id0", 0x00); + qdev_prop_set_uint16(dev, "id1", 0x89); + qdev_prop_set_uint16(dev, "id2", 0x00); + qdev_prop_set_uint16(dev, "id3", 0x18); + qdev_prop_set_string(dev, "name", name); + qdev_init_nofail(dev); + + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); + return OBJECT_CHECK(pflash_t, (dev), "cfi.pflash01"); +} + static void vexpress_common_init(VEDBoardInfo *daughterboard, QEMUMachineInitArgs *args) { @@ -561,11 +590,8 @@ static void vexpress_common_init(VEDBoardInfo *daughterboard, sysbus_create_simple("pl111", map[VE_CLCD], pic[14]); dinfo = drive_get_next(IF_PFLASH); - pflash0 = pflash_cfi01_register(map[VE_NORFLASH0], NULL, "vexpress.flash0", - VEXPRESS_FLASH_SIZE, dinfo ? dinfo->bdrv : NULL, - VEXPRESS_FLASH_SECT_SIZE, - VEXPRESS_FLASH_SIZE / VEXPRESS_FLASH_SECT_SIZE, 4, - 0x00, 0x89, 0x00, 0x18, 0); + pflash0 = ve_pflash_cfi01_register(map[VE_NORFLASH0], "vexpress.flash0", + dinfo ? dinfo->bdrv : NULL); if (!pflash0) { fprintf(stderr, "vexpress: error registering flash 0.\n"); exit(1); @@ -580,11 +606,8 @@ static void vexpress_common_init(VEDBoardInfo *daughterboard, } dinfo = drive_get_next(IF_PFLASH); - if (!pflash_cfi01_register(map[VE_NORFLASH1], NULL, "vexpress.flash1", - VEXPRESS_FLASH_SIZE, dinfo ? dinfo->bdrv : NULL, - VEXPRESS_FLASH_SECT_SIZE, - VEXPRESS_FLASH_SIZE / VEXPRESS_FLASH_SECT_SIZE, 4, - 0x00, 0x89, 0x00, 0x18, 0)) { + if (!ve_pflash_cfi01_register(map[VE_NORFLASH1], "vexpress.flash1", + dinfo ? dinfo->bdrv : NULL)) { fprintf(stderr, "vexpress: error registering flash 1.\n"); exit(1); }