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[2001:ba8:1e3::]) by mx.google.com with ESMTPS id ee8si7809819wic.70.1969.12.31.16.00.00 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 03 Sep 2013 12:12:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pmaydell@chiark.greenend.org.uk designates 2001:ba8:1e3:: as permitted sender) client-ip=2001:ba8:1e3::; Received: by chiark.greenend.org.uk (Debian Exim 4.72 #1) with local (return-path pmaydell@chiark.greenend.org.uk) id 1VGw1Y-0005oB-Bu; Tue, 03 Sep 2013 20:12:24 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Andreas Schwab , Alexander Graf , "Mian M. Hamayun" , kvmarm@lists.cs.columbia.edu, =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [PATCH v6 08/24] target-arm: Disable 32 bit CPUs in 64 bit linux-user builds Date: Tue, 3 Sep 2013 20:12:08 +0100 Message-Id: <1378235544-22290-9-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1378235544-22290-1-git-send-email-peter.maydell@linaro.org> References: <1378235544-22290-1-git-send-email-peter.maydell@linaro.org> Sender: Peter Maydell X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.173 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , If we're building aarch64-linux-user then the 32 bit CPUs are all unwanted, because they can't possibly execute the 64 bit binaries we will be running; disable them. Signed-off-by: Peter Maydell --- target-arm/cpu.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 827e28e..67d285d 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -288,8 +288,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) acc->parent_realize(dev, errp); } -/* CPU models */ - static ObjectClass *arm_cpu_class_by_name(const char *cpu_model) { ObjectClass *oc; @@ -309,6 +307,9 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model) return oc; } +/* CPU models. These are not needed for the AArch64 linux-user build. */ +#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) + static void arm926_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); @@ -837,6 +838,8 @@ static void arm_any_initfn(Object *obj) } #endif +#endif /* !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) */ + typedef struct ARMCPUInfo { const char *name; void (*initfn)(Object *obj); @@ -844,6 +847,7 @@ typedef struct ARMCPUInfo { } ARMCPUInfo; static const ARMCPUInfo arm_cpus[] = { +#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) { .name = "arm926", .initfn = arm926_initfn }, { .name = "arm946", .initfn = arm946_initfn }, { .name = "arm1026", .initfn = arm1026_initfn }, @@ -879,6 +883,7 @@ static const ARMCPUInfo arm_cpus[] = { #ifdef CONFIG_USER_ONLY { .name = "any", .initfn = arm_any_initfn }, #endif +#endif }; static void arm_cpu_class_init(ObjectClass *oc, void *data)