From patchwork Tue Sep 3 19:12:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 19728 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ye0-f197.google.com (mail-ye0-f197.google.com [209.85.213.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id C71F824869 for ; Tue, 3 Sep 2013 19:12:45 +0000 (UTC) Received: by mail-ye0-f197.google.com with SMTP id q5sf3652593yen.4 for ; Tue, 03 Sep 2013 12:12:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=mime-version:x-gm-message-state:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=FNF6RmhPPiFFguR+2NETN5BbaTYcqwbfNa/5h+zovOk=; b=d4+STwYq3x3+qT795+xKmr+MeOudhCGUboAKftsClRxTGyd515W6Q5fKM1lqv9F196 KeDA6/Lla9+IFt4fPSQkvM5TVe/E6VGqAoXQCI4f/R3w+zvQd5gP7VuOvUvVe0UrcmRA rhAITx134IE0WMEBHjN8HHa6xJfx0OpcQrO7mvrUAKy5EuHZRVuPvEhNQsn+l/N236qC jA4msM3F4k/3zWQ6h1edBxRG6twyApK/jYQ7wZnjW/YZ8d43giXiyoYSmPJtQya3PAw8 5BKflIvvTZ0qAqTYbnQOjT2ki84vFzA1qGtCJo+gIdFsU9xX+11inM6Bgg2vGD94adgI t6wQ== X-Received: by 10.236.54.68 with SMTP id h44mr10699519yhc.21.1378235565581; Tue, 03 Sep 2013 12:12:45 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.48.41 with SMTP id i9ls777987qen.44.gmail; Tue, 03 Sep 2013 12:12:45 -0700 (PDT) X-Received: by 10.221.47.193 with SMTP id ut1mr29520118vcb.8.1378235565458; Tue, 03 Sep 2013 12:12:45 -0700 (PDT) Received: from mail-ve0-f170.google.com (mail-ve0-f170.google.com [209.85.128.170]) by mx.google.com with ESMTPS id op1si4839812vcb.42.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 03 Sep 2013 12:12:45 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.128.170 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.170; Received: by mail-ve0-f170.google.com with SMTP id 15so4418281vea.15 for ; Tue, 03 Sep 2013 12:12:45 -0700 (PDT) X-Gm-Message-State: ALoCoQmM0P4DQzYvXl9SwZQMz5zoywpqizKjfTIx6xSuMW1CkQLb47SPHAmMEL0ZVWTzwYCraaHJ X-Received: by 10.58.155.68 with SMTP id vu4mr9535939veb.21.1378235565374; Tue, 03 Sep 2013 12:12:45 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp190479vcz; Tue, 3 Sep 2013 12:12:44 -0700 (PDT) X-Received: by 10.180.160.203 with SMTP id xm11mr2666367wib.17.1378235545867; Tue, 03 Sep 2013 12:12:25 -0700 (PDT) Received: from chiark.greenend.org.uk (v6.chiark.greenend.org.uk. [2001:ba8:1e3::]) by mx.google.com with ESMTPS id ul8si7650569wjc.64.1969.12.31.16.00.00 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 03 Sep 2013 12:12:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pmaydell@chiark.greenend.org.uk designates 2001:ba8:1e3:: as permitted sender) client-ip=2001:ba8:1e3::; Received: by chiark.greenend.org.uk (Debian Exim 4.72 #1) with local (return-path pmaydell@chiark.greenend.org.uk) id 1VGw1Y-0005o5-8a; Tue, 03 Sep 2013 20:12:24 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Andreas Schwab , Alexander Graf , "Mian M. Hamayun" , kvmarm@lists.cs.columbia.edu, =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [PATCH v6 05/24] target-arm: Fix target_ulong/uint32_t confusions Date: Tue, 3 Sep 2013 20:12:05 +0100 Message-Id: <1378235544-22290-6-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1378235544-22290-1-git-send-email-peter.maydell@linaro.org> References: <1378235544-22290-1-git-send-email-peter.maydell@linaro.org> Sender: Peter Maydell X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.170 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Alexander Graf Correct a few places that were using uint32_t or a 32 bit only format string to handle something that should be a target_ulong. Signed-off-by: Alexander Graf Signed-off-by: John Rigby [PMM: split out to separate patch; added gen_goto_tb() and gen_set_pc_im() dest params to list of things to change.] Signed-off-by: Peter Maydell --- target-arm/cpu.h | 4 ++-- target-arm/translate.c | 9 +++++---- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index f2abdf3..8d1cc47 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -823,7 +823,7 @@ static inline bool cpu_has_work(CPUState *cpu) #include "exec/exec-all.h" /* Load an instruction and return it in the standard little-endian order */ -static inline uint32_t arm_ldl_code(CPUARMState *env, uint32_t addr, +static inline uint32_t arm_ldl_code(CPUARMState *env, target_ulong addr, bool do_swap) { uint32_t insn = cpu_ldl_code(env, addr); @@ -834,7 +834,7 @@ static inline uint32_t arm_ldl_code(CPUARMState *env, uint32_t addr, } /* Ditto, for a halfword (Thumb) instruction */ -static inline uint16_t arm_lduw_code(CPUARMState *env, uint32_t addr, +static inline uint16_t arm_lduw_code(CPUARMState *env, target_ulong addr, bool do_swap) { uint16_t insn = cpu_lduw_code(env, addr); diff --git a/target-arm/translate.c b/target-arm/translate.c index a6adcc8..5a465fc 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -904,7 +904,7 @@ DO_GEN_ST(st8) DO_GEN_ST(st16) DO_GEN_ST(st32) -static inline void gen_set_pc_im(uint32_t val) +static inline void gen_set_pc_im(target_ulong val) { tcg_gen_movi_i32(cpu_R[15], val); } @@ -3412,7 +3412,7 @@ static int disas_vfp_insn(CPUARMState * env, DisasContext *s, uint32_t insn) return 0; } -static inline void gen_goto_tb(DisasContext *s, int n, uint32_t dest) +static inline void gen_goto_tb(DisasContext *s, int n, target_ulong dest) { TranslationBlock *tb; @@ -9992,7 +9992,7 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu, uint16_t *gen_opc_end; int j, lj; target_ulong pc_start; - uint32_t next_page_start; + target_ulong next_page_start; int num_insns; int max_insns; @@ -10146,7 +10146,8 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu, } if (tcg_check_temp_count()) { - fprintf(stderr, "TCG temporary leak before %08x\n", dc->pc); + fprintf(stderr, "TCG temporary leak before "TARGET_FMT_lx"\n", + dc->pc); } /* Translation stops when a conditional branch is encountered.