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[2001:ba8:1e3::]) by mx.google.com with ESMTPS id vj5si7656817wjc.43.1969.12.31.16.00.00 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 03 Sep 2013 12:12:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pmaydell@chiark.greenend.org.uk designates 2001:ba8:1e3:: as permitted sender) client-ip=2001:ba8:1e3::; Received: by chiark.greenend.org.uk (Debian Exim 4.72 #1) with local (return-path pmaydell@chiark.greenend.org.uk) id 1VGw1Y-0005o3-7Z; Tue, 03 Sep 2013 20:12:24 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Andreas Schwab , Alexander Graf , "Mian M. Hamayun" , kvmarm@lists.cs.columbia.edu, =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [PATCH v6 04/24] target-arm: Export cpu_env Date: Tue, 3 Sep 2013 20:12:04 +0100 Message-Id: <1378235544-22290-5-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1378235544-22290-1-git-send-email-peter.maydell@linaro.org> References: <1378235544-22290-1-git-send-email-peter.maydell@linaro.org> Sender: Peter Maydell X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.176 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Alexander Graf The cpu_env tcg variable will be used by both the AArch32 and AArch64 handling code. Unstaticify it, so that both sides can make use of it. Signed-off-by: Alexander Graf Signed-off-by: John Rigby Message-id: 1368505980-17151-3-git-send-email-john.rigby@linaro.org Signed-off-by: Peter Maydell --- target-arm/translate.c | 2 +- target-arm/translate.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 1bb6f46..a6adcc8 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -60,7 +60,7 @@ static uint32_t gen_opc_condexec_bits[OPC_BUF_SIZE]; #define DISAS_WFI 4 #define DISAS_SWI 5 -static TCGv_ptr cpu_env; +TCGv_ptr cpu_env; /* We reuse the same 64-bit temporaries for efficiency. */ static TCGv_i64 cpu_V0, cpu_V1, cpu_M0; static TCGv_i32 cpu_R[16]; diff --git a/target-arm/translate.h b/target-arm/translate.h index e727bc6..8ba1433 100644 --- a/target-arm/translate.h +++ b/target-arm/translate.h @@ -24,4 +24,6 @@ typedef struct DisasContext { int vec_stride; } DisasContext; +extern TCGv_ptr cpu_env; + #endif /* TARGET_ARM_TRANSLATE_H */