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[2001:ba8:1e3::]) by mx.google.com with ESMTPS id ax1si7639560wjc.107.1969.12.31.16.00.00 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 03 Sep 2013 12:12:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pmaydell@chiark.greenend.org.uk designates 2001:ba8:1e3:: as permitted sender) client-ip=2001:ba8:1e3::; Received: by chiark.greenend.org.uk (Debian Exim 4.72 #1) with local (return-path pmaydell@chiark.greenend.org.uk) id 1VGw1Y-0005oi-Rb; Tue, 03 Sep 2013 20:12:24 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Andreas Schwab , Alexander Graf , "Mian M. Hamayun" , kvmarm@lists.cs.columbia.edu, =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [PATCH v6 21/24] linux-user: Add AArch64 support Date: Tue, 3 Sep 2013 20:12:21 +0100 Message-Id: <1378235544-22290-22-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1378235544-22290-1-git-send-email-peter.maydell@linaro.org> References: <1378235544-22290-1-git-send-email-peter.maydell@linaro.org> Sender: Peter Maydell X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.46 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Alexander Graf This patch adds support for AArch64 in all the small corners of linux-user (primarily in image loading and startup code). Signed-off-by: Alexander Graf Signed-off-by: John Rigby Message-id: 1368505980-17151-11-git-send-email-john.rigby@linaro.org [PMM: * removed some unnecessary #defines from syscall.h * catch attempts to use a 32 bit only cpu with aarch64-linux-user * termios stuff moved into its own patch * we specify our minimum uname version here now ] Signed-off-by: Peter Maydell --- linux-user/aarch64/syscall.h | 9 +++++++++ linux-user/elfload.c | 15 +++++++++++++-- linux-user/main.c | 16 ++++++++++++++++ 3 files changed, 38 insertions(+), 2 deletions(-) create mode 100644 linux-user/aarch64/syscall.h diff --git a/linux-user/aarch64/syscall.h b/linux-user/aarch64/syscall.h new file mode 100644 index 0000000..aef419e --- /dev/null +++ b/linux-user/aarch64/syscall.h @@ -0,0 +1,9 @@ +struct target_pt_regs { + uint64_t regs[31]; + uint64_t sp; + uint64_t pc; + uint64_t pstate; +}; + +#define UNAME_MACHINE "aarch64" +#define UNAME_MINIMUM_RELEASE "3.8.0" diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 7ce2eab..e2f40b9 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -269,16 +269,26 @@ static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUX86State *en #define ELF_START_MMAP 0x80000000 -#define elf_check_arch(x) ( (x) == EM_ARM ) +#define elf_check_arch(x) ((x) == ELF_MACHINE) +#define ELF_ARCH ELF_MACHINE + +#ifdef TARGET_AARCH64 +#define ELF_CLASS ELFCLASS64 +#else #define ELF_CLASS ELFCLASS32 -#define ELF_ARCH EM_ARM +#endif static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop) { abi_long stack = infop->start_stack; memset(regs, 0, sizeof(*regs)); + +#ifdef TARGET_AARCH64 + regs->pc = infop->entry & ~0x3ULL; + regs->sp = stack; +#else regs->ARM_cpsr = 0x10; if (infop->entry & 1) regs->ARM_cpsr |= CPSR_T; @@ -292,6 +302,7 @@ static inline void init_thread(struct target_pt_regs *regs, /* For uClinux PIC binaries. */ /* XXX: Linux does this only on ARM with no MMU (do we care ?) */ regs->ARM_r10 = infop->start_data; +#endif } #define ELF_NREG 18 diff --git a/linux-user/main.c b/linux-user/main.c index d530f01..e213085 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -3964,6 +3964,22 @@ int main(int argc, char **argv, char **envp) cpu_x86_load_seg(env, R_FS, 0); cpu_x86_load_seg(env, R_GS, 0); #endif +#elif defined(TARGET_AARCH64) + { + int i; + + if (!(arm_feature(env, ARM_FEATURE_AARCH64))) { + fprintf(stderr, + "The selected ARM CPU does not support 64 bit mode\n"); + exit(1); + } + + for (i = 0; i < 31; i++) { + env->xregs[i] = regs->regs[i]; + } + env->pc = regs->pc; + env->xregs[31] = regs->sp; + } #elif defined(TARGET_ARM) { int i;