From patchwork Thu Aug 22 18:28:11 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 19426 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-qa0-f69.google.com (mail-qa0-f69.google.com [209.85.216.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 0CA00246AD for ; Thu, 22 Aug 2013 18:28:18 +0000 (UTC) Received: by mail-qa0-f69.google.com with SMTP id bv4sf793638qab.0 for ; Thu, 22 Aug 2013 11:28:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:x-gm-message-state:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=T67rxuJ2nKl1RYhjqzK+qE0KA/E7pODn2fBgRjkA1ag=; b=QyvtgKF4YFLVqD2gPPjypm+zsbu9jF7bayrHrRg/rWAJd0+A9vW8S1862MDhL6cBLJ b35D/4PdXg1OQgUAQu58ezy35WZ0jhd5h8s1rW6qOC7PbncLmO0gWE41sg2GVFz5u5h3 r+E2XqQm5MrGtleZq3Kn2j1deXqrTvv4FcfG/ekHtxLHXmkS+yzMM/5itoSv1yucJ+R3 DVc0d7lr6u83oywbKOnGmpdsBnWgrTS0sRi6rm9EheljMRRN8O2L30SNerknkE37gHLm vlkeWVQ3Cs+Em2bkaxGhrZ9D0JhT6pDiKhp+qG95K7ugPfAWhICSZyu5xezTv/LBzYVa CD8w== X-Received: by 10.236.124.33 with SMTP id w21mr4942339yhh.15.1377196097859; Thu, 22 Aug 2013 11:28:17 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.75.228 with SMTP id f4ls1224025qew.12.gmail; Thu, 22 Aug 2013 11:28:17 -0700 (PDT) X-Received: by 10.58.155.68 with SMTP id vu4mr12712039veb.21.1377196097724; Thu, 22 Aug 2013 11:28:17 -0700 (PDT) Received: from mail-vc0-f178.google.com (mail-vc0-f178.google.com [209.85.220.178]) by mx.google.com with ESMTPS id gw1si4355865vcb.137.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 22 Aug 2013 11:28:17 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.220.178 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.178; Received: by mail-vc0-f178.google.com with SMTP id ha12so1329814vcb.9 for ; Thu, 22 Aug 2013 11:28:17 -0700 (PDT) X-Gm-Message-State: ALoCoQlIdbSjPd980Btw4MYY72rpN14t6as+IxSI4/41SnFehM+ymLa9gEGYNZG6FqANNJO+jb+C X-Received: by 10.52.165.45 with SMTP id yv13mr10721639vdb.1.1377196097259; Thu, 22 Aug 2013 11:28:17 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp46819vcz; Thu, 22 Aug 2013 11:28:16 -0700 (PDT) X-Received: by 10.14.205.135 with SMTP id j7mr367947eeo.93.1377196094870; Thu, 22 Aug 2013 11:28:14 -0700 (PDT) Received: from mnementh.archaic.org.uk (1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa. [2001:8b0:1d0::1]) by mx.google.com with ESMTPS id x42si13308543eel.356.1969.12.31.16.00.00 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 22 Aug 2013 11:28:14 -0700 (PDT) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1VCZcC-0001xC-Dv; Thu, 22 Aug 2013 19:28:12 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, "Michael S. Tsirkin" Subject: [RFC 1/2] hw/pci: Add PCI capability to allow BARs at 0 Date: Thu, 22 Aug 2013 19:28:11 +0100 Message-Id: <1377196092-7482-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1377196092-7482-1-git-send-email-peter.maydell@linaro.org> References: <1377196092-7482-1-git-send-email-peter.maydell@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.178 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The PCI specification says that 0 isn't a valid address for an MMIO bar. However some devices won't object if you program a BAR at address 0 and will then respond to bus accesses at that address. (In particular the host PCI controller for the Versatile/Realview boards behaves like this, and Linux relies on it for setting up a 1:1 mapping between PCI address space and system address space for bus-mastering DMA.) To allow us to model devices with this out-of-spec quirk, add a new QEMU_PCI_ADDR0_ALLOWED flag to cap_present which bypasses the "address 0 is not valid" test in pci_bar_address(). Signed-off-by: Peter Maydell --- hw/pci/pci.c | 3 ++- include/hw/pci/pci.h | 3 +++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 4c004f5..f09d799 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -1058,7 +1058,8 @@ static pcibus_t pci_bar_address(PCIDevice *d, /* XXX: as we cannot support really dynamic mappings, we handle specific values as invalid mappings. */ - if (last_addr <= new_addr || new_addr == 0 || + if (last_addr <= new_addr || + (new_addr == 0 && !(d->cap_present & QEMU_PCI_ADDR0_ALLOWED)) || last_addr == PCI_BAR_UNMAPPED) { return PCI_BAR_UNMAPPED; } diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index ccec2ba..3d6a940 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -157,6 +157,9 @@ enum { QEMU_PCI_CAP_SHPC = (1 << QEMU_PCI_SHPC_BITNR), #define QEMU_PCI_SLOTID_BITNR 6 QEMU_PCI_CAP_SLOTID = (1 << QEMU_PCI_SLOTID_BITNR), + /* PCI device (in breach of the spec) allows MMIO BAR at address 0 */ +#define QEMU_PCI_ADDR0_ALLOWED_BITNR 7 + QEMU_PCI_ADDR0_ALLOWED = (1 << QEMU_PCI_ADDR0_ALLOWED_BITNR) }; #define TYPE_PCI_DEVICE "pci-device"