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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id fa18si3566198wic.43.2013.07.01.10.54.23 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 01 Jul 2013 10:54:23 -0700 (PDT) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Uti0X-0002KH-H3; Mon, 01 Jul 2013 18:35:21 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Alexander Graf , Andreas Schwab , "Mian M. Hamayun" Subject: [PATCH v5 05/21] target-arm: Pass DisasContext* to gen_set_pc_im() Date: Mon, 1 Jul 2013 18:35:04 +0100 Message-Id: <1372700120-8896-6-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1372700120-8896-1-git-send-email-peter.maydell@linaro.org> References: <1372700120-8896-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQn1lZz+gvCdXOjWFPF8sxazLAW6dOGliXMCkYytrjqwsKuAH7cEWZAjaHizUKuItHd/Dg4s X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.169 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , We want gen_set_pc_im() to work for both AArch64 and AArch32, but to do this we'll need the DisasContext* so we can tell which mode we're in, so pass it in as a parameter. Signed-off-by: Peter Maydell --- target-arm/translate.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 02319b3..c87a1f8 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -903,7 +903,7 @@ DO_GEN_ST(st8) DO_GEN_ST(st16) DO_GEN_ST(st32) -static inline void gen_set_pc_im(target_ulong val) +static inline void gen_set_pc_im(DisasContext *s, target_ulong val) { tcg_gen_movi_i32(cpu_R[15], val); } @@ -3418,10 +3418,10 @@ static inline void gen_goto_tb(DisasContext *s, int n, target_ulong dest) tb = s->tb; if ((tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK)) { tcg_gen_goto_tb(n); - gen_set_pc_im(dest); + gen_set_pc_im(s, dest); tcg_gen_exit_tb((tcg_target_long)tb + n); } else { - gen_set_pc_im(dest); + gen_set_pc_im(s, dest); tcg_gen_exit_tb(0); } } @@ -3550,7 +3550,7 @@ gen_set_condexec (DisasContext *s) static void gen_exception_insn(DisasContext *s, int offset, int excp) { gen_set_condexec(s); - gen_set_pc_im(s->pc - offset); + gen_set_pc_im(s, s->pc - offset); gen_exception(excp); s->is_jmp = DISAS_JUMP; } @@ -3559,7 +3559,7 @@ static void gen_nop_hint(DisasContext *s, int val) { switch (val) { case 3: /* wfi */ - gen_set_pc_im(s->pc); + gen_set_pc_im(s, s->pc); s->is_jmp = DISAS_WFI; break; case 2: /* wfe */ @@ -6335,7 +6335,7 @@ static int disas_coproc_insn(CPUARMState * env, DisasContext *s, uint32_t insn) if (isread) { return 1; } - gen_set_pc_im(s->pc); + gen_set_pc_im(s, s->pc); s->is_jmp = DISAS_WFI; return 0; default: @@ -6351,7 +6351,7 @@ static int disas_coproc_insn(CPUARMState * env, DisasContext *s, uint32_t insn) tmp64 = tcg_const_i64(ri->resetvalue); } else if (ri->readfn) { TCGv_ptr tmpptr; - gen_set_pc_im(s->pc); + gen_set_pc_im(s, s->pc); tmp64 = tcg_temp_new_i64(); tmpptr = tcg_const_ptr(ri); gen_helper_get_cp_reg64(tmp64, cpu_env, tmpptr); @@ -6374,7 +6374,7 @@ static int disas_coproc_insn(CPUARMState * env, DisasContext *s, uint32_t insn) tmp = tcg_const_i32(ri->resetvalue); } else if (ri->readfn) { TCGv_ptr tmpptr; - gen_set_pc_im(s->pc); + gen_set_pc_im(s, s->pc); tmp = tcg_temp_new_i32(); tmpptr = tcg_const_ptr(ri); gen_helper_get_cp_reg(tmp, cpu_env, tmpptr); @@ -6409,7 +6409,7 @@ static int disas_coproc_insn(CPUARMState * env, DisasContext *s, uint32_t insn) tcg_temp_free_i32(tmphi); if (ri->writefn) { TCGv_ptr tmpptr = tcg_const_ptr(ri); - gen_set_pc_im(s->pc); + gen_set_pc_im(s, s->pc); gen_helper_set_cp_reg64(cpu_env, tmpptr, tmp64); tcg_temp_free_ptr(tmpptr); } else { @@ -6420,7 +6420,7 @@ static int disas_coproc_insn(CPUARMState * env, DisasContext *s, uint32_t insn) if (ri->writefn) { TCGv_i32 tmp; TCGv_ptr tmpptr; - gen_set_pc_im(s->pc); + gen_set_pc_im(s, s->pc); tmp = load_reg(s, rt); tmpptr = tcg_const_ptr(ri); gen_helper_set_cp_reg(cpu_env, tmpptr, tmp); @@ -7964,7 +7964,7 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s) break; case 0xf: /* swi */ - gen_set_pc_im(s->pc); + gen_set_pc_im(s, s->pc); s->is_jmp = DISAS_SWI; break; default: @@ -9814,7 +9814,7 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s) if (cond == 0xf) { /* swi */ - gen_set_pc_im(s->pc); + gen_set_pc_im(s, s->pc); s->is_jmp = DISAS_SWI; break; } @@ -10062,7 +10062,7 @@ static inline void gen_intermediate_code_internal(CPUARMState *env, gen_set_label(dc->condlabel); } if (dc->condjmp || !dc->is_jmp) { - gen_set_pc_im(dc->pc); + gen_set_pc_im(dc, dc->pc); dc->condjmp = 0; } gen_set_condexec(dc);