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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id z6si11990059eel.142.2013.07.01.10.35.22 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 01 Jul 2013 10:35:23 -0700 (PDT) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Uti0X-0002K4-3x; Mon, 01 Jul 2013 18:35:21 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Alexander Graf , Andreas Schwab , "Mian M. Hamayun" Subject: [PATCH v5 02/21] target-arm: Extract the disas struct to a header file Date: Mon, 1 Jul 2013 18:35:01 +0100 Message-Id: <1372700120-8896-3-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1372700120-8896-1-git-send-email-peter.maydell@linaro.org> References: <1372700120-8896-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQkpcIUb2HXtQdDRo4p6xCGCKW1YX/QRcHzopjNkmMFuUDXkJg9EyYGZq2gAIKWSwR+gsRzj X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.181 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Alexander Graf We will need to share the disassembly status struct between AArch32 and AArch64 modes. So put it into a header file that both sides can use. Signed-off-by: Alexander Graf Signed-off-by: John Rigby Message-id: 1368505980-17151-2-git-send-email-john.rigby@linaro.org Signed-off-by: Peter Maydell --- target-arm/translate.c | 24 +----------------------- target-arm/translate.h | 27 +++++++++++++++++++++++++++ 2 files changed, 28 insertions(+), 23 deletions(-) create mode 100644 target-arm/translate.h diff --git a/target-arm/translate.c b/target-arm/translate.c index 1618524..1a9c1a0 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -45,29 +45,7 @@ #define ARCH(x) do { if (!ENABLE_ARCH_##x) goto illegal_op; } while(0) -/* internal defines */ -typedef struct DisasContext { - target_ulong pc; - int is_jmp; - /* Nonzero if this instruction has been conditionally skipped. */ - int condjmp; - /* The label that will be jumped to when the instruction is skipped. */ - int condlabel; - /* Thumb-2 conditional execution bits. */ - int condexec_mask; - int condexec_cond; - struct TranslationBlock *tb; - int singlestep_enabled; - int thumb; - int bswap_code; -#if !defined(CONFIG_USER_ONLY) - int user; -#endif - int vfp_enabled; - int vec_len; - int vec_stride; -} DisasContext; - +#include "translate.h" static uint32_t gen_opc_condexec_bits[OPC_BUF_SIZE]; #if defined(CONFIG_USER_ONLY) diff --git a/target-arm/translate.h b/target-arm/translate.h new file mode 100644 index 0000000..e727bc6 --- /dev/null +++ b/target-arm/translate.h @@ -0,0 +1,27 @@ +#ifndef TARGET_ARM_TRANSLATE_H +#define TARGET_ARM_TRANSLATE_H + +/* internal defines */ +typedef struct DisasContext { + target_ulong pc; + int is_jmp; + /* Nonzero if this instruction has been conditionally skipped. */ + int condjmp; + /* The label that will be jumped to when the instruction is skipped. */ + int condlabel; + /* Thumb-2 conditional execution bits. */ + int condexec_mask; + int condexec_cond; + struct TranslationBlock *tb; + int singlestep_enabled; + int thumb; + int bswap_code; +#if !defined(CONFIG_USER_ONLY) + int user; +#endif + int vfp_enabled; + int vec_len; + int vec_stride; +} DisasContext; + +#endif /* TARGET_ARM_TRANSLATE_H */