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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id pc8si4037093lbc.13.2013.05.23.05.00.07 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 23 May 2013 05:00:09 -0700 (PDT) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1UfUBg-0001Nw-Hu; Thu, 23 May 2013 13:00:04 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Richard Henderson , John Rigby , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Blue Swirl , Aurelien Jarno Subject: [PATCH 08/10] target-arm: Remove gen_{ld,st}* from thumb2 decoder Date: Thu, 23 May 2013 13:00:02 +0100 Message-Id: <1369310404-5285-9-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1369310404-5285-1-git-send-email-peter.maydell@linaro.org> References: <1369310404-5285-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQmago8pasRVQYXY2JW0cPiK4lqAqICHBOiul4l7sF08/ISTPYY3XXYVEVSKv8Jbh7abcFib X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c01::22b is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Signed-off-by: Peter Maydell --- target-arm/translate.c | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 953c5fb..0ca68fe 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -8134,18 +8134,22 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw } if (insn & (1 << 20)) { /* ldrd */ - tmp = gen_ld32(addr, IS_USER(s)); + tmp = tcg_temp_new_i32(); + tcg_gen_qemu_ld32u(tmp, addr, IS_USER(s)); store_reg(s, rs, tmp); tcg_gen_addi_i32(addr, addr, 4); - tmp = gen_ld32(addr, IS_USER(s)); + tmp = tcg_temp_new_i32(); + tcg_gen_qemu_ld32u(tmp, addr, IS_USER(s)); store_reg(s, rd, tmp); } else { /* strd */ tmp = load_reg(s, rs); - gen_st32(tmp, addr, IS_USER(s)); + tcg_gen_qemu_st32(tmp, addr, IS_USER(s)); + tcg_temp_free_i32(tmp); tcg_gen_addi_i32(addr, addr, 4); tmp = load_reg(s, rd); - gen_st32(tmp, addr, IS_USER(s)); + tcg_gen_qemu_st32(tmp, addr, IS_USER(s)); + tcg_temp_free_i32(tmp); } if (insn & (1 << 21)) { /* Base writeback. */ @@ -8181,10 +8185,12 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw /* tbh */ tcg_gen_add_i32(addr, addr, tmp); tcg_temp_free_i32(tmp); - tmp = gen_ld16u(addr, IS_USER(s)); + tmp = tcg_temp_new_i32(); + tcg_gen_qemu_ld16u(tmp, addr, IS_USER(s)); } else { /* tbb */ tcg_temp_free_i32(tmp); - tmp = gen_ld8u(addr, IS_USER(s)); + tmp = tcg_temp_new_i32(); + tcg_gen_qemu_ld8u(tmp, addr, IS_USER(s)); } tcg_temp_free_i32(addr); tcg_gen_shli_i32(tmp, tmp, 1); @@ -8219,9 +8225,11 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw if ((insn & (1 << 24)) == 0) tcg_gen_addi_i32(addr, addr, -8); /* Load PC into tmp and CPSR into tmp2. */ - tmp = gen_ld32(addr, 0); + tmp = tcg_temp_new_i32(); + tcg_gen_qemu_ld32u(tmp, addr, 0); tcg_gen_addi_i32(addr, addr, 4); - tmp2 = gen_ld32(addr, 0); + tmp2 = tcg_temp_new_i32(); + tcg_gen_qemu_ld32u(tmp2, addr, 0); if (insn & (1 << 21)) { /* Base writeback. */ if (insn & (1 << 24)) { @@ -8259,7 +8267,8 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw continue; if (insn & (1 << 20)) { /* Load. */ - tmp = gen_ld32(addr, IS_USER(s)); + tmp = tcg_temp_new_i32(); + tcg_gen_qemu_ld32u(tmp, addr, IS_USER(s)); if (i == 15) { gen_bx(s, tmp); } else if (i == rn) { @@ -8271,7 +8280,8 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw } else { /* Store. */ tmp = load_reg(s, i); - gen_st32(tmp, addr, IS_USER(s)); + tcg_gen_qemu_st32(tmp, addr, IS_USER(s)); + tcg_temp_free_i32(tmp); } tcg_gen_addi_i32(addr, addr, 4); }