From patchwork Tue Feb 26 17:40:13 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 15092 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 51A7C23DFE for ; Tue, 26 Feb 2013 17:40:36 +0000 (UTC) Received: from mail-vb0-f52.google.com (mail-vb0-f52.google.com [209.85.212.52]) by fiordland.canonical.com (Postfix) with ESMTP id 888F6A197DC for ; Tue, 26 Feb 2013 17:40:35 +0000 (UTC) Received: by mail-vb0-f52.google.com with SMTP id fa15so43697vbb.11 for ; Tue, 26 Feb 2013 09:40:35 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=SnZ54v+QJlqADD622cCKfmU4zFtVQbQMTCpvyu41Vzk=; b=blV0AD2gDcprNam5fidwPmtYU7W/pQYC5y0rGdeTc52zSnChs+W3UoytsY7fjQXW8V RU7oZSneQgm1w15hI9eqBCNsXlC9wD/LYsJcCGHWUxlzUbpbfCnXAuPsP0VtmhnEKocX E8bgoxfit+tHqxFIuENatQoI7mhq1MH4JHKB5K7wzFFj561wCg+QtdloeU9JQZRmaeXA 9vKcwhUnETOt+nomzrteEQ+LpprZUHHb6sI8Vgh/YmR19Prry30hGVZ4PkX7ffWBlM/a PLt9OwqfpZE0kHHC1fbqBz+V//FrI/AkTIo2Fl5wV0niPhozF9ZgRi4SY5UVFu3rwQba 1Ylg== X-Received: by 10.52.93.20 with SMTP id cq20mr10590877vdb.38.1361900434937; Tue, 26 Feb 2013 09:40:34 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.145.101 with SMTP id st5csp125908veb; Tue, 26 Feb 2013 09:40:34 -0800 (PST) X-Received: by 10.14.178.69 with SMTP id e45mr52222345eem.9.1361900428095; Tue, 26 Feb 2013 09:40:28 -0800 (PST) Received: from mnementh.archaic.org.uk (1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa. [2001:8b0:1d0::1]) by mx.google.com with ESMTPS id g8si2700275eem.103.2013.02.26.09.40.27 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 26 Feb 2013 09:40:27 -0800 (PST) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Authentication-Results: mx.google.com; spf=neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1UAOVp-0007Nr-Kb; Tue, 26 Feb 2013 17:40:21 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, kvm@vger.kernel.org, Marcelo Tosatti , kvmarm@lists.cs.columbia.edu, Blue Swirl , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Gleb Natapov , Paolo Bonzini Subject: [PATCH v7 03/11] target-arm: Drop CPUARMState* argument from bank_number() Date: Tue, 26 Feb 2013 17:40:13 +0000 Message-Id: <1361900421-28354-4-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1361900421-28354-1-git-send-email-peter.maydell@linaro.org> References: <1361900421-28354-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQkqcpmZ4gT/HbKi0BuB0pnxi3+dU6Rmbh3U0O7BpN8rKV5VaMsdYjgkYQd/GFDuZOpWgst8 Drop the CPUARMState* argument from bank_number(), since we only use it for passing to cpu_abort(). Use hw_error() instead. This avoids propagating further interfaces using env pointers. In the long term this function's callers need auditing to fix problems where badly behaved guests can pass invalid bank numbers. Signed-off-by: Peter Maydell Reviewed-by: Andreas Färber --- target-arm/helper.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index e97e1a5..7fa4ba0 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1617,7 +1617,7 @@ uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) #else /* Map CPU modes onto saved register banks. */ -static inline int bank_number(CPUARMState *env, int mode) +static inline int bank_number(int mode) { switch (mode) { case ARM_CPU_MODE_USR: @@ -1634,8 +1634,7 @@ static inline int bank_number(CPUARMState *env, int mode) case ARM_CPU_MODE_FIQ: return 5; } - cpu_abort(env, "Bad mode %x\n", mode); - return -1; + hw_error("bank number requested for bad CPSR mode value 0x%x\n", mode); } void switch_mode(CPUARMState *env, int mode) @@ -1655,12 +1654,12 @@ void switch_mode(CPUARMState *env, int mode) memcpy (env->regs + 8, env->fiq_regs, 5 * sizeof(uint32_t)); } - i = bank_number(env, old_mode); + i = bank_number(old_mode); env->banked_r13[i] = env->regs[13]; env->banked_r14[i] = env->regs[14]; env->banked_spsr[i] = env->spsr; - i = bank_number(env, mode); + i = bank_number(mode); env->regs[13] = env->banked_r13[i]; env->regs[14] = env->banked_r14[i]; env->spsr = env->banked_spsr[i]; @@ -2530,7 +2529,7 @@ void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) if ((env->uncached_cpsr & CPSR_M) == mode) { env->regs[13] = val; } else { - env->banked_r13[bank_number(env, mode)] = val; + env->banked_r13[bank_number(mode)] = val; } } @@ -2539,7 +2538,7 @@ uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) if ((env->uncached_cpsr & CPSR_M) == mode) { return env->regs[13]; } else { - return env->banked_r13[bank_number(env, mode)]; + return env->banked_r13[bank_number(mode)]; } }