From patchwork Fri Feb 22 18:10:01 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 15031 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 70D7D23F78 for ; Fri, 22 Feb 2013 18:10:18 +0000 (UTC) Received: from mail-ve0-f170.google.com (mail-ve0-f170.google.com [209.85.128.170]) by fiordland.canonical.com (Postfix) with ESMTP id 11003A18B66 for ; Fri, 22 Feb 2013 18:10:17 +0000 (UTC) Received: by mail-ve0-f170.google.com with SMTP id 14so809649vea.1 for ; Fri, 22 Feb 2013 10:10:17 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:mime-version:content-type :content-transfer-encoding:x-gm-message-state; bh=v3ie7Ksbp3zrYHtilPkFt5kfk9ztfbe+zOry/2puWE8=; b=c3Cg7FzuXt1vq5cx5EWynsNRV8jDDhB1StBPeKMSWcUbnNk0ee3s1haclDfQ/pLgRe 4maAo7qJ9Q6w8CMtDAM7bUzEKOZQ3xX6qD9Gdc5/i0ig/Jr54FFvu4ydAPJabb4DfL24 AU7bepuGxW2u5E1GdgTyD8BnhyGF5+bmAfFsguBZ2aEJuyEl78llBy59QrvcBZRRUs/a qwi6DXyn/nZY1+vo1D6obbkF275HJVL6p4zOpTOqNQ0VXVQsmpuqgB00FUKXanv1w09a 4MN4E580VlOUszW8cbd4LxkDIffjyKaX7eZBWwnyGDh5YyyEn9MwyUYT+tpTyC3JQqpv wTfw== X-Received: by 10.52.88.237 with SMTP id bj13mr3379457vdb.75.1361556617483; Fri, 22 Feb 2013 10:10:17 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.145.101 with SMTP id st5csp101289veb; Fri, 22 Feb 2013 10:10:16 -0800 (PST) X-Received: by 10.204.11.68 with SMTP id s4mr1441881bks.74.1361556612020; Fri, 22 Feb 2013 10:10:12 -0800 (PST) Received: from mnementh.archaic.org.uk (1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa. [2001:8b0:1d0::1]) by mx.google.com with ESMTPS id iq2si1112751bkc.46.2013.02.22.10.10.10 (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 22 Feb 2013 10:10:11 -0800 (PST) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Authentication-Results: mx.google.com; spf=neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1U8x4P-0005ik-Vo; Fri, 22 Feb 2013 18:10:05 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Blue Swirl , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paul Brook , Anthony Liguori , Richard Henderson , Alexander Graf Subject: [PATCH 2/6] cpu: Introduce ENV_OFFSET macros Date: Fri, 22 Feb 2013 18:10:01 +0000 Message-Id: <1361556605-21963-3-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1361556605-21963-1-git-send-email-peter.maydell@linaro.org> References: <1361556605-21963-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQkcwjkVCpCec353ilFAnpXxKUjxPMz11s5IjQP5otDJ6xAbJ7XZKuQpUEH0VqeVW5j5WAxx From: Andreas Färber Introduce ENV_OFFSET macros which can be used in non-target-specific code that needs to generate TCG instructions which reference CPUState fields given the cpu_env register that TCG targets set up with a pointer to the CPUArchState struct. Signed-off-by: Andreas Färber Signed-off-by: Peter Maydell --- target-alpha/cpu-qom.h | 1 + target-arm/cpu-qom.h | 2 ++ target-cris/cpu-qom.h | 1 + target-i386/cpu-qom.h | 1 + target-lm32/cpu-qom.h | 1 + target-m68k/cpu-qom.h | 1 + target-microblaze/cpu-qom.h | 1 + target-mips/cpu-qom.h | 1 + target-openrisc/cpu.h | 2 ++ target-ppc/cpu-qom.h | 3 ++- target-s390x/cpu-qom.h | 1 + target-sh4/cpu-qom.h | 1 + target-sparc/cpu-qom.h | 1 + target-unicore32/cpu-qom.h | 1 + target-xtensa/cpu-qom.h | 1 + 15 files changed, 18 insertions(+), 1 deletion(-) diff --git a/target-alpha/cpu-qom.h b/target-alpha/cpu-qom.h index c0f6c6d..252bd14 100644 --- a/target-alpha/cpu-qom.h +++ b/target-alpha/cpu-qom.h @@ -72,5 +72,6 @@ static inline AlphaCPU *alpha_env_get_cpu(CPUAlphaState *env) #define ENV_GET_CPU(e) CPU(alpha_env_get_cpu(e)) +#define ENV_OFFSET offsetof(AlphaCPU, env) #endif diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index aff7bf3..7539727 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -109,6 +109,8 @@ static inline ARMCPU *arm_env_get_cpu(CPUARMState *env) #define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e)) +#define ENV_OFFSET offsetof(ARMCPU, env) + void register_cp_regs_for_features(ARMCPU *cpu); #endif diff --git a/target-cris/cpu-qom.h b/target-cris/cpu-qom.h index 2bac71f..11e5286 100644 --- a/target-cris/cpu-qom.h +++ b/target-cris/cpu-qom.h @@ -71,5 +71,6 @@ static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env) #define ENV_GET_CPU(e) CPU(cris_env_get_cpu(e)) +#define ENV_OFFSET offsetof(CRISCPU, env) #endif diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h index 48e6b54..b7bdcb6 100644 --- a/target-i386/cpu-qom.h +++ b/target-i386/cpu-qom.h @@ -74,5 +74,6 @@ static inline X86CPU *x86_env_get_cpu(CPUX86State *env) #define ENV_GET_CPU(e) CPU(x86_env_get_cpu(e)) +#define ENV_OFFSET offsetof(X86CPU, env) #endif diff --git a/target-lm32/cpu-qom.h b/target-lm32/cpu-qom.h index d7525b3..c0b6ce5 100644 --- a/target-lm32/cpu-qom.h +++ b/target-lm32/cpu-qom.h @@ -69,5 +69,6 @@ static inline LM32CPU *lm32_env_get_cpu(CPULM32State *env) #define ENV_GET_CPU(e) CPU(lm32_env_get_cpu(e)) +#define ENV_OFFSET offsetof(LM32CPU, env) #endif diff --git a/target-m68k/cpu-qom.h b/target-m68k/cpu-qom.h index 20e5684..f4c33b2 100644 --- a/target-m68k/cpu-qom.h +++ b/target-m68k/cpu-qom.h @@ -68,5 +68,6 @@ static inline M68kCPU *m68k_env_get_cpu(CPUM68KState *env) #define ENV_GET_CPU(e) CPU(m68k_env_get_cpu(e)) +#define ENV_OFFSET offsetof(M68kCPU, env) #endif diff --git a/target-microblaze/cpu-qom.h b/target-microblaze/cpu-qom.h index 5ea911c..a0248a5 100644 --- a/target-microblaze/cpu-qom.h +++ b/target-microblaze/cpu-qom.h @@ -68,5 +68,6 @@ static inline MicroBlazeCPU *mb_env_get_cpu(CPUMBState *env) #define ENV_GET_CPU(e) CPU(mb_env_get_cpu(e)) +#define ENV_OFFSET offsetof(MicroBlazeCPU, env) #endif diff --git a/target-mips/cpu-qom.h b/target-mips/cpu-qom.h index 55aa692..c6bcddf 100644 --- a/target-mips/cpu-qom.h +++ b/target-mips/cpu-qom.h @@ -72,5 +72,6 @@ static inline MIPSCPU *mips_env_get_cpu(CPUMIPSState *env) #define ENV_GET_CPU(e) CPU(mips_env_get_cpu(e)) +#define ENV_OFFSET offsetof(MIPSCPU, env) #endif diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index 419f007..4cfd1c7 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -340,6 +340,8 @@ static inline OpenRISCCPU *openrisc_env_get_cpu(CPUOpenRISCState *env) #define ENV_GET_CPU(e) CPU(openrisc_env_get_cpu(e)) +#define ENV_OFFSET offsetof(OpenRISCCPU, env) + OpenRISCCPU *cpu_openrisc_init(const char *cpu_model); void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf); diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h index 2b82cdb..4e8ceca 100644 --- a/target-ppc/cpu-qom.h +++ b/target-ppc/cpu-qom.h @@ -78,7 +78,8 @@ static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env) #define ENV_GET_CPU(e) CPU(ppc_env_get_cpu(e)) -PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr); +#define ENV_OFFSET offsetof(PowerPCCPU, env) +PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr); #endif diff --git a/target-s390x/cpu-qom.h b/target-s390x/cpu-qom.h index 237184f..f6e5145 100644 --- a/target-s390x/cpu-qom.h +++ b/target-s390x/cpu-qom.h @@ -69,5 +69,6 @@ static inline S390CPU *s390_env_get_cpu(CPUS390XState *env) #define ENV_GET_CPU(e) CPU(s390_env_get_cpu(e)) +#define ENV_OFFSET offsetof(S390CPU, env) #endif diff --git a/target-sh4/cpu-qom.h b/target-sh4/cpu-qom.h index d368db1..f4e8976 100644 --- a/target-sh4/cpu-qom.h +++ b/target-sh4/cpu-qom.h @@ -68,5 +68,6 @@ static inline SuperHCPU *sh_env_get_cpu(CPUSH4State *env) #define ENV_GET_CPU(e) CPU(sh_env_get_cpu(e)) +#define ENV_OFFSET offsetof(SuperHCPU, env) #endif diff --git a/target-sparc/cpu-qom.h b/target-sparc/cpu-qom.h index 89cd1cf..efeeca0 100644 --- a/target-sparc/cpu-qom.h +++ b/target-sparc/cpu-qom.h @@ -73,5 +73,6 @@ static inline SPARCCPU *sparc_env_get_cpu(CPUSPARCState *env) #define ENV_GET_CPU(e) CPU(sparc_env_get_cpu(e)) +#define ENV_OFFSET offsetof(SPARCCPU, env) #endif diff --git a/target-unicore32/cpu-qom.h b/target-unicore32/cpu-qom.h index 625c614..c6590bd 100644 --- a/target-unicore32/cpu-qom.h +++ b/target-unicore32/cpu-qom.h @@ -58,5 +58,6 @@ static inline UniCore32CPU *uc32_env_get_cpu(CPUUniCore32State *env) #define ENV_GET_CPU(e) CPU(uc32_env_get_cpu(e)) +#define ENV_OFFSET offsetof(UniCore32CPU, env) #endif diff --git a/target-xtensa/cpu-qom.h b/target-xtensa/cpu-qom.h index 270de16..c78136b 100644 --- a/target-xtensa/cpu-qom.h +++ b/target-xtensa/cpu-qom.h @@ -78,5 +78,6 @@ static inline XtensaCPU *xtensa_env_get_cpu(const CPUXtensaState *env) #define ENV_GET_CPU(e) CPU(xtensa_env_get_cpu(e)) +#define ENV_OFFSET offsetof(XtensaCPU, env) #endif