From patchwork Mon Feb 4 13:44:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 14533 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 240F923FEE for ; Mon, 4 Feb 2013 13:44:48 +0000 (UTC) Received: from mail-vc0-f176.google.com (mail-vc0-f176.google.com [209.85.220.176]) by fiordland.canonical.com (Postfix) with ESMTP id A706DA18276 for ; Mon, 4 Feb 2013 13:44:47 +0000 (UTC) Received: by mail-vc0-f176.google.com with SMTP id fy27so3880339vcb.35 for ; Mon, 04 Feb 2013 05:44:47 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state; bh=K5GD/nNsSVoboEvF8O8Mm3YP8p3WXV4HGYsinjpJlZ0=; b=E9+hel4naUnR07+uxXZiwe1PX4T3R6vEpdYipPfchbH0XOLL5bQGC0Q+cs1gMEnsc4 k42OkHG/9qe1qFvNhSEDlPAfF9TuZGsSjFg8pJ/XpiFBkkO7yBYLD7LpF6Jw+UnxTQ0s b9Xa3LiYK2xTP5+TuTsjrnf/FrS8sgOwIguDwgKy7TwBzaUmNYS6BmHUXHKSbtlF74T3 LIRLE0yy5M3t7e+pAcRZ7dPDg970OhnkoHfMwwlxzFd+Era/4N9cUMb2drvYELmjz0ag O3pJ673KzX86xLECkSEEY5IkAjLQZxxLYkCVNvFR4dAsfUrET9j/R7PVn1dVgLGWy1lT B12A== X-Received: by 10.52.24.98 with SMTP id t2mr16178129vdf.69.1359985487181; Mon, 04 Feb 2013 05:44:47 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.252.8 with SMTP id zo8csp87654vec; Mon, 4 Feb 2013 05:44:46 -0800 (PST) X-Received: by 10.112.17.166 with SMTP id p6mr2747154lbd.41.1359985480809; Mon, 04 Feb 2013 05:44:40 -0800 (PST) Received: from mnementh.archaic.org.uk (1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa. [2001:8b0:1d0::1]) by mx.google.com with ESMTPS id v2si7230978lbj.94.2013.02.04.05.44.39 (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 04 Feb 2013 05:44:40 -0800 (PST) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Authentication-Results: mx.google.com; spf=neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1U2MLd-0007eZ-Ew; Mon, 04 Feb 2013 13:44:37 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Anthony Liguori Subject: [PATCH 08/10] hw/vexpress: Pass voltage sensor properties to sysctl device Date: Mon, 4 Feb 2013 13:44:34 +0000 Message-Id: <1359985476-29380-9-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1359985476-29380-1-git-send-email-peter.maydell@linaro.org> References: <1359985476-29380-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQlqxgQoSDLVjO5ZSxm/GEbgwZJ2Dgy9zRqU2gU3ialwS4vPBzwm+TyZKxxzEhLZuub3sM3J Pass voltage sensor properties to the sysctl device. Since these are daughterboard specific, we specify them via the VEDBoardInfo structure. Signed-off-by: Peter Maydell --- hw/vexpress.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/hw/vexpress.c b/hw/vexpress.c index d028382..8653200 100644 --- a/hw/vexpress.c +++ b/hw/vexpress.c @@ -154,6 +154,8 @@ struct VEDBoardInfo { hwaddr loader_start; const hwaddr gic_cpu_if_addr; uint32_t proc_id; + uint32_t num_voltage_sensors; + const uint32_t *voltages; DBoardInitFn *init; }; @@ -246,11 +248,25 @@ static void a9_daughterboard_init(const VEDBoardInfo *daughterboard, sysbus_create_varargs("l2x0", 0x1e00a000, NULL); } +/* Voltage values for SYS_CFG_VOLT daughterboard registers; + * values are in microvolts. + */ +static const uint32_t a9_voltages[] = { + 1000000, /* VD10 : 1.0V : SoC internal logic voltage */ + 1000000, /* VD10_S2 : 1.0V : PL310, L2 cache, RAM, non-PL310 logic */ + 1000000, /* VD10_S3 : 1.0V : Cortex-A9, cores, MPEs, SCU, PL310 logic */ + 1800000, /* VCC1V8 : 1.8V : DDR2 SDRAM, test chip DDR2 I/O supply */ + 900000, /* DDR2VTT : 0.9V : DDR2 SDRAM VTT termination voltage */ + 3300000, /* VCC3V3 : 3.3V : local board supply for misc external logic */ +}; + static const VEDBoardInfo a9_daughterboard = { .motherboard_map = motherboard_legacy_map, .loader_start = 0x60000000, .gic_cpu_if_addr = 0x1e000100, .proc_id = 0x0c000191, + .num_voltage_sensors = ARRAY_SIZE(a9_voltages), + .voltages = a9_voltages, .init = a9_daughterboard_init, }; @@ -338,11 +354,17 @@ static void a15_daughterboard_init(const VEDBoardInfo *daughterboard, /* 0x7ffd0000: PL354 static memory controller: not modelled */ } +static const uint32_t a15_voltages[] = { + 900000, /* Vcore: 0.9V : CPU core voltage */ +}; + static const VEDBoardInfo a15_daughterboard = { .motherboard_map = motherboard_aseries_map, .loader_start = 0x80000000, .gic_cpu_if_addr = 0x2c002000, .proc_id = 0x14000237, + .num_voltage_sensors = ARRAY_SIZE(a15_voltages), + .voltages = a15_voltages, .init = a15_daughterboard_init, }; @@ -358,6 +380,7 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard, MemoryRegion *vram = g_new(MemoryRegion, 1); MemoryRegion *sram = g_new(MemoryRegion, 1); const hwaddr *map = daughterboard->motherboard_map; + int i; daughterboard->init(daughterboard, args->ram_size, args->cpu_model, pic); @@ -370,6 +393,13 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard, sysctl = qdev_create(NULL, "realview_sysctl"); qdev_prop_set_uint32(sysctl, "sys_id", sys_id); qdev_prop_set_uint32(sysctl, "proc_id", daughterboard->proc_id); + qdev_prop_set_uint32(sysctl, "len-db-voltage", + daughterboard->num_voltage_sensors); + for (i = 0; i < daughterboard->num_voltage_sensors; i++) { + char *propname = g_strdup_printf("db-voltage[%d]", i); + qdev_prop_set_uint32(sysctl, propname, daughterboard->voltages[i]); + g_free(propname); + } qdev_init_nofail(sysctl); sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, map[VE_SYSREGS]);