From patchwork Thu Jan 24 15:43:57 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 14266 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id A8B4923E1A for ; Thu, 24 Jan 2013 15:44:16 +0000 (UTC) Received: from mail-vc0-f181.google.com (mail-vc0-f181.google.com [209.85.220.181]) by fiordland.canonical.com (Postfix) with ESMTP id 66F44A1855B for ; Thu, 24 Jan 2013 15:44:16 +0000 (UTC) Received: by mail-vc0-f181.google.com with SMTP id d16so6300710vcd.26 for ; Thu, 24 Jan 2013 07:44:16 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:mime-version:content-type :content-transfer-encoding:x-gm-message-state; bh=TmF2XxCHK2HpnQkEvl4YfegfR536E39apPiztPPoBSk=; b=AZhV7AW4/qPW7wqOgHgQzCAmtPxY/TQ60vzMcmWvalAryp1ISnyEVaZCkzihAkt8oy Rb0TEJH7JHinjhXRWd8WDJ44wGKZT836YoVtxnymjD/Rg2jjJZ/meRxPXrzpw+rkoiS0 k2Ce3qGWF5IkIjiZV0kDYMa42Dm0a1LWJ9FSXgUpwXPPs8CxbA+qiCmHBQw/J13bhv8L pftD1vZ2MyB+GkuU3iQ0RSyAxo2diyFTWrrkzjn2K2Zf6dHie3CLqeFUeIdsgKR7hVYq OG+LmlfFp2zPlK0l/v+qb/5jBZV7c2hHxiJiJ+WveglBiwd6y+m2KB5C8QmiEEmP3a7Z 4KrA== X-Received: by 10.52.176.6 with SMTP id ce6mr2059392vdc.57.1359042255860; Thu, 24 Jan 2013 07:44:15 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.58.145.101 with SMTP id st5csp71083veb; Thu, 24 Jan 2013 07:44:15 -0800 (PST) X-Received: by 10.204.141.4 with SMTP id k4mr999017bku.60.1359042250175; Thu, 24 Jan 2013 07:44:10 -0800 (PST) Received: from mnementh.archaic.org.uk (1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa. [2001:8b0:1d0::1]) by mx.google.com with ESMTPS id iv5si9947712bkc.275.2013.01.24.07.44.09 (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 24 Jan 2013 07:44:10 -0800 (PST) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Authentication-Results: mx.google.com; spf=neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1TyOy9-0002zn-1S; Thu, 24 Jan 2013 15:44:01 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, kvm@vger.kernel.org, Marcelo Tosatti , kvmarm@lists.cs.columbia.edu, Blue Swirl , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Gleb Natapov Subject: [RFC v5 5/8] hw/arm_gic: Add presave/postload hooks Date: Thu, 24 Jan 2013 15:43:57 +0000 Message-Id: <1359042240-11482-6-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1359042240-11482-1-git-send-email-peter.maydell@linaro.org> References: <1359042240-11482-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQl8VYc6ugNpHpqF6lGbrlR/wxsG7ZikvvdrNJndU2KnJnLZXEjvc4SscRQoA/kcyTqVNyxA Add presave/postload hooks to the ARM GIC common base class. These will be used by the KVM in-kernel GIC subclass to sync state between kernel and userspace when migrating. Signed-off-by: Peter Maydell Reviewed-by: Andreas Färber --- hw/arm_gic_common.c | 10 ++++++++++ hw/arm_gic_internal.h | 2 ++ 2 files changed, 12 insertions(+) diff --git a/hw/arm_gic_common.c b/hw/arm_gic_common.c index 40e8dd7..2947622 100644 --- a/hw/arm_gic_common.c +++ b/hw/arm_gic_common.c @@ -23,9 +23,14 @@ static void gic_save(QEMUFile *f, void *opaque) { GICState *s = (GICState *)opaque; + ARMGICCommonClass *c = ARM_GIC_COMMON_GET_CLASS(s); int i; int j; + if (c->pre_save) { + c->pre_save(s); + } + qemu_put_be32(f, s->enabled); for (i = 0; i < s->num_cpu; i++) { qemu_put_be32(f, s->cpu_enabled[i]); @@ -57,6 +62,7 @@ static void gic_save(QEMUFile *f, void *opaque) static int gic_load(QEMUFile *f, void *opaque, int version_id) { GICState *s = (GICState *)opaque; + ARMGICCommonClass *c = ARM_GIC_COMMON_GET_CLASS(s); int i; int j; @@ -91,6 +97,10 @@ static int gic_load(QEMUFile *f, void *opaque, int version_id) s->irq_state[i].trigger = qemu_get_byte(f); } + if (c->post_load) { + c->post_load(s); + } + return 0; } diff --git a/hw/arm_gic_internal.h b/hw/arm_gic_internal.h index 699352c..3640be0 100644 --- a/hw/arm_gic_internal.h +++ b/hw/arm_gic_internal.h @@ -118,6 +118,8 @@ void gic_init_irqs_and_distributor(GICState *s, int num_irq); typedef struct ARMGICCommonClass { SysBusDeviceClass parent_class; + void (*pre_save)(GICState *s); + void (*post_load)(GICState *s); } ARMGICCommonClass; #define TYPE_ARM_GIC "arm_gic"