From patchwork Tue Oct 9 13:16:49 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 12060 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 586D323E29 for ; Tue, 9 Oct 2012 13:17:03 +0000 (UTC) Received: from mail-ia0-f180.google.com (mail-ia0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 0E94CA18C75 for ; Tue, 9 Oct 2012 13:17:02 +0000 (UTC) Received: by mail-ia0-f180.google.com with SMTP id f6so794022iag.11 for ; Tue, 09 Oct 2012 06:17:02 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=vMZ3bGbPuYQ7O9o5uWMHq75xJaV6hDrB652CTOZ8mNc=; b=nJZ/jtn80PMcOp5W/fZqd8w3jJyQWm+pn28+70gRPmE7ez0fCrtJFzDzSjKWiELGpn zgSA923GF55E2H16yJbuGuEZnsPj+Bxa37IIwoprqRarUmX1F0aeYGFhF+ZdEB/RQ/lb fjRjb/LcsN9A2zsYevvQwgk2P5AILmQfwDVnr77dOIOtIk5rxdVVWuwEvAfrX29rJqzL 2EZJxwlfD355fpaDAFgd9wX44EfglQqji6oNxdTpudk2Eo/WtyHY6hDCNCuD1Uor4hgw 8jxgr2Z08hHn4YQUEMaJqaePUEx1uunTmvAY9YxBzGGB8IZJpjYDHkvH6PUOHLw/2NGj ix8g== Received: by 10.50.159.194 with SMTP id xe2mr1564122igb.62.1349788622801; Tue, 09 Oct 2012 06:17:02 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp54249igt; Tue, 9 Oct 2012 06:17:02 -0700 (PDT) Received: by 10.216.137.94 with SMTP id x72mr11559560wei.187.1349788621520; Tue, 09 Oct 2012 06:17:01 -0700 (PDT) Received: from mnementh.archaic.org.uk (1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa. [2001:8b0:1d0::1]) by mx.google.com with ESMTPS id n11si22081378wiw.6.2012.10.09.06.17.01 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 09 Oct 2012 06:17:01 -0700 (PDT) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Authentication-Results: mx.google.com; spf=neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1TLZg2-0001fN-BH; Tue, 09 Oct 2012 14:16:50 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: Aurelien Jarno , Richard Henderson , patches@linaro.org, Riku Voipio Subject: [PATCH 1/2] configure: Remove unnecessary host_guest_base code Date: Tue, 9 Oct 2012 14:16:49 +0100 Message-Id: <1349788610-6380-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1349788610-6380-1-git-send-email-peter.maydell@linaro.org> References: <1349788610-6380-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQm0Rtwbw0aOAdkyCOb0uN4+z2tQEBOVU5NRgbW5q2LNbdVgOqsSnQqZ7gPPzJTGZn7vAB+F All TCG hosts now support guest-base functionality, so we can remove the setting of host_guest_base to 'yes' in every arm of the case "$cpu" statement, and simply set guest_base to default to 'yes'. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- configure | 31 ++----------------------------- 1 file changed, 2 insertions(+), 29 deletions(-) diff --git a/configure b/configure index c4a7837..a6bdf9a 100755 --- a/configure +++ b/configure @@ -198,7 +198,7 @@ cocoa="no" softmmu="yes" linux_user="no" bsd_user="no" -guest_base="" +guest_base="yes" uname_release="" mixemu="no" aix="no" @@ -867,63 +867,36 @@ for opt do esac done -host_guest_base="no" case "$cpu" in sparc) LDFLAGS="-m32 $LDFLAGS" QEMU_CFLAGS="-m32 -mcpu=ultrasparc $QEMU_CFLAGS" - host_guest_base="yes" ;; sparc64) LDFLAGS="-m64 $LDFLAGS" QEMU_CFLAGS="-m64 -mcpu=ultrasparc $QEMU_CFLAGS" - host_guest_base="yes" ;; s390) QEMU_CFLAGS="-m31 -march=z990 $QEMU_CFLAGS" LDFLAGS="-m31 $LDFLAGS" - host_guest_base="yes" ;; s390x) QEMU_CFLAGS="-m64 -march=z990 $QEMU_CFLAGS" LDFLAGS="-m64 $LDFLAGS" - host_guest_base="yes" ;; i386) QEMU_CFLAGS="-m32 $QEMU_CFLAGS" LDFLAGS="-m32 $LDFLAGS" cc_i386='$(CC) -m32' - host_guest_base="yes" ;; x86_64) QEMU_CFLAGS="-m64 $QEMU_CFLAGS" LDFLAGS="-m64 $LDFLAGS" cc_i386='$(CC) -m32' - host_guest_base="yes" - ;; - arm*) - host_guest_base="yes" - ;; - ppc*) - host_guest_base="yes" - ;; - mips*) - host_guest_base="yes" - ;; - ia64*) - host_guest_base="yes" - ;; - hppa*) - host_guest_base="yes" - ;; - unicore32*) - host_guest_base="yes" ;; + # No special flags required for other host CPUs esac -[ -z "$guest_base" ] && guest_base="$host_guest_base" - - default_target_list="" # these targets are portable