From patchwork Tue Aug 7 13:51:15 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 10570 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 8353923F61 for ; Tue, 7 Aug 2012 13:51:34 +0000 (UTC) Received: from mail-gg0-f180.google.com (mail-gg0-f180.google.com [209.85.161.180]) by fiordland.canonical.com (Postfix) with ESMTP id 36053A1877C for ; Tue, 7 Aug 2012 13:51:34 +0000 (UTC) Received: by ggnf1 with SMTP id f1so3684247ggn.11 for ; Tue, 07 Aug 2012 06:51:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=67Jw+SAnuMRFzwyZe2BJKIlS8yxuS9z3rum0mqqyFwM=; b=bbKHER6KEG4DJ1hMcR7Aq6od25F+Xb98M0nkDdRRIF0ovzw237ygJeIvuek0yIkosX pbiQ25Va2RzaaGf0DQSaN3hhy4XeHH0BsHDF2wHDozEbRapUpw2wkv0o2nJu4ub9PTKy t5ShOR7zO9WPBhxlUlYFqcpTeR8jpoVRU0jFAQH757tZtiEVe9Or4aWlZGkkzfIUkdmK yJ72FetoyF1VDRcth14Kg9nY8wltr/YU8HwbtJqDOrxDXPYUaPlvs72ZDz0tphAU6U6G gXYS8SL8f0/Lq8Dbyw/s0irj8slU0epeWgc/zfe05kb2c7FU5kMim6XyISlDDLWiSsLw x8aA== Received: by 10.50.94.166 with SMTP id dd6mr8611892igb.11.1344347493331; Tue, 07 Aug 2012 06:51:33 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.87.40 with SMTP id u8csp500329igz; Tue, 7 Aug 2012 06:51:27 -0700 (PDT) Received: by 10.14.209.129 with SMTP id s1mr8084899eeo.24.1344347485175; Tue, 07 Aug 2012 06:51:25 -0700 (PDT) Received: from mnementh.archaic.org.uk (1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.d.1.0.0.b.8.0.1.0.0.2.ip6.arpa. [2001:8b0:1d0::1]) by mx.google.com with ESMTPS id w6si11979377eel.36.2012.08.07.06.51.18 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 07 Aug 2012 06:51:25 -0700 (PDT) Received-SPF: neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) client-ip=2001:8b0:1d0::1; Authentication-Results: mx.google.com; spf=neutral (google.com: 2001:8b0:1d0::1 is neither permitted nor denied by best guess record for domain of pm215@archaic.org.uk) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SykBo-00056q-RT; Tue, 07 Aug 2012 14:51:16 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org Subject: [PATCH 1/2] cpu_dump_state: move DUMP_FPU and DUMP_CCOP flags from x86-only to generic Date: Tue, 7 Aug 2012 14:51:15 +0100 Message-Id: <1344347476-19613-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1344347476-19613-1-git-send-email-peter.maydell@linaro.org> References: <1344347476-19613-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQmxC2cMnoclVsnBtGDWCWUfAfZca8b7s0Q725UITLuQ5qd+UV4g4V/hfSddQrXMdw29mPli Move the DUMP_FPU and DUMP_CCOP flags for cpu_dump_state() from being x86-specific flags to being generic ones. This allows us to drop some TARGET_I386 ifdefs in various places, and means that we can (potentially) be more consistent across architectures about which monitor commands or debug abort printouts include FPU register contents and info about QEMU's condition-code optimisations. Signed-off-by: Peter Maydell --- cpu-all.h | 3 +++ cpu-exec.c | 2 +- cpus.c | 6 +----- exec.c | 12 ++---------- monitor.c | 8 +------- target-i386/cpu.c | 2 +- target-i386/cpu.h | 4 ---- target-i386/helper.c | 4 ++-- target-i386/seg_helper.c | 4 ++-- target-i386/smm_helper.c | 4 ++-- 10 files changed, 15 insertions(+), 34 deletions(-) diff --git a/cpu-all.h b/cpu-all.h index 82ba1d7..19cc34d 100644 --- a/cpu-all.h +++ b/cpu-all.h @@ -345,6 +345,9 @@ CPUArchState *cpu_copy(CPUArchState *env); CPUArchState *qemu_get_cpu(int cpu); #define CPU_DUMP_CODE 0x00010000 +#define CPU_DUMP_FPU 0x00020000 /* dump FPU register state, not just integer */ +/* dump info about TCG QEMU's condition code optimization state */ +#define CPU_DUMP_CCOP 0x00040000 void cpu_dump_state(CPUArchState *env, FILE *f, fprintf_function cpu_fprintf, int flags); diff --git a/cpu-exec.c b/cpu-exec.c index 543460c..58ded3e 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -554,7 +554,7 @@ int cpu_exec(CPUArchState *env) #if defined(TARGET_I386) env->eflags = env->eflags | cpu_cc_compute_all(env, CC_OP) | (DF & DF_MASK); - log_cpu_state(env, X86_DUMP_CCOP); + log_cpu_state(env, CPU_DUMP_CCOP); env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); #elif defined(TARGET_M68K) cpu_m68k_flush_flags(env, env->cc_op); diff --git a/cpus.c b/cpus.c index 3de2e27..1760101 100644 --- a/cpus.c +++ b/cpus.c @@ -394,11 +394,7 @@ void hw_error(const char *fmt, ...) fprintf(stderr, "\n"); for(env = first_cpu; env != NULL; env = env->next_cpu) { fprintf(stderr, "CPU #%d:\n", env->cpu_index); -#ifdef TARGET_I386 - cpu_dump_state(env, stderr, fprintf, X86_DUMP_FPU); -#else - cpu_dump_state(env, stderr, fprintf, 0); -#endif + cpu_dump_state(env, stderr, fprintf, CPU_DUMP_FPU); } va_end(ap); abort(); diff --git a/exec.c b/exec.c index a42a0b5..bde2bbf 100644 --- a/exec.c +++ b/exec.c @@ -1744,20 +1744,12 @@ void cpu_abort(CPUArchState *env, const char *fmt, ...) fprintf(stderr, "qemu: fatal: "); vfprintf(stderr, fmt, ap); fprintf(stderr, "\n"); -#ifdef TARGET_I386 - cpu_dump_state(env, stderr, fprintf, X86_DUMP_FPU | X86_DUMP_CCOP); -#else - cpu_dump_state(env, stderr, fprintf, 0); -#endif + cpu_dump_state(env, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP); if (qemu_log_enabled()) { qemu_log("qemu: fatal: "); qemu_log_vprintf(fmt, ap2); qemu_log("\n"); -#ifdef TARGET_I386 - log_cpu_state(env, X86_DUMP_FPU | X86_DUMP_CCOP); -#else - log_cpu_state(env, 0); -#endif + log_cpu_state(env, CPU_DUMP_FPU | CPU_DUMP_CCOP); qemu_log_flush(); qemu_log_close(); } diff --git a/monitor.c b/monitor.c index 49dccfe..2ea78c4 100644 --- a/monitor.c +++ b/monitor.c @@ -899,13 +899,7 @@ static void do_info_registers(Monitor *mon) { CPUArchState *env; env = mon_get_cpu(); -#ifdef TARGET_I386 - cpu_dump_state(env, (FILE *)mon, monitor_fprintf, - X86_DUMP_FPU); -#else - cpu_dump_state(env, (FILE *)mon, monitor_fprintf, - 0); -#endif + cpu_dump_state(env, (FILE *)mon, monitor_fprintf, CPU_DUMP_FPU); } static void do_info_jit(Monitor *mon) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 857b94e..60e152a 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -1618,7 +1618,7 @@ static void x86_cpu_reset(CPUState *s) if (qemu_loglevel_mask(CPU_LOG_RESET)) { qemu_log("CPU Reset (CPU %d)\n", env->cpu_index); - log_cpu_state(env, X86_DUMP_FPU | X86_DUMP_CCOP); + log_cpu_state(env, CPU_DUMP_FPU | CPU_DUMP_CCOP); } xcc->parent_reset(s); diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 2a61c81..a650000 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -945,10 +945,6 @@ void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4); void cpu_smm_update(CPUX86State *env); uint64_t cpu_get_tsc(CPUX86State *env); -/* used to debug */ -#define X86_DUMP_FPU 0x0001 /* dump FPU state too */ -#define X86_DUMP_CCOP 0x0002 /* dump qemu flag cache */ - #define TARGET_PAGE_BITS 12 #ifdef TARGET_X86_64 diff --git a/target-i386/helper.c b/target-i386/helper.c index b748d90..7564816 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -284,7 +284,7 @@ void cpu_dump_state(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf, cpu_fprintf(f, "\nDR6=" TARGET_FMT_lx " DR7=" TARGET_FMT_lx "\n", env->dr[6], env->dr[7]); } - if (flags & X86_DUMP_CCOP) { + if (flags & CPU_DUMP_CCOP) { if ((unsigned)env->cc_op < CC_OP_NB) snprintf(cc_op_name, sizeof(cc_op_name), "%s", cc_op_str[env->cc_op]); else @@ -303,7 +303,7 @@ void cpu_dump_state(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf, } } cpu_fprintf(f, "EFER=%016" PRIx64 "\n", env->efer); - if (flags & X86_DUMP_FPU) { + if (flags & CPU_DUMP_FPU) { int fptag; fptag = 0; for(i = 0; i < 8; i++) { diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index a4b8b64..032be1a 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -32,7 +32,7 @@ #ifdef DEBUG_PCALL # define LOG_PCALL(...) qemu_log_mask(CPU_LOG_PCALL, ## __VA_ARGS__) # define LOG_PCALL_STATE(env) \ - log_cpu_state_mask(CPU_LOG_PCALL, (env), X86_DUMP_CCOP) + log_cpu_state_mask(CPU_LOG_PCALL, (env), CPU_DUMP_CCOP) #else # define LOG_PCALL(...) do { } while (0) # define LOG_PCALL_STATE(env) do { } while (0) @@ -1174,7 +1174,7 @@ static void do_interrupt_all(int intno, int is_int, int error_code, qemu_log(" EAX=" TARGET_FMT_lx, EAX); } qemu_log("\n"); - log_cpu_state(env, X86_DUMP_CCOP); + log_cpu_state(env, CPU_DUMP_CCOP); #if 0 { int i; diff --git a/target-i386/smm_helper.c b/target-i386/smm_helper.c index bc1bfa2..7ed9cc4 100644 --- a/target-i386/smm_helper.c +++ b/target-i386/smm_helper.c @@ -52,7 +52,7 @@ void do_smm_enter(CPUX86State *env1) env = env1; qemu_log_mask(CPU_LOG_INT, "SMM: enter\n"); - log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP); + log_cpu_state_mask(CPU_LOG_INT, env, CPU_DUMP_CCOP); env->hflags |= HF_SMM_MASK; cpu_smm_update(env); @@ -301,7 +301,7 @@ void helper_rsm(void) cpu_smm_update(env); qemu_log_mask(CPU_LOG_INT, "SMM: after RSM\n"); - log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP); + log_cpu_state_mask(CPU_LOG_INT, env, CPU_DUMP_CCOP); } #endif /* !CONFIG_USER_ONLY */