From patchwork Thu Jul 5 17:00:52 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 9860 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 15EDB23E1B for ; Thu, 5 Jul 2012 17:00:58 +0000 (UTC) Received: from mail-gh0-f180.google.com (mail-gh0-f180.google.com [209.85.160.180]) by fiordland.canonical.com (Postfix) with ESMTP id DA59FA1894E for ; Thu, 5 Jul 2012 17:00:57 +0000 (UTC) Received: by ghbz12 with SMTP id z12so8270040ghb.11 for ; Thu, 05 Jul 2012 10:00:57 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=ysVkAEgG4Pt4iwaDihr+QF/OGM/c411eEFaltOnCKjE=; b=YzES1qMtpgMbD/G4tPp1I01RCc4uKmvEbuDtvZ1UAaS9/GmQunMTSPRD5/ZhyDUyFj 8j+0HyevJFVZaO/SinLHFM8OWLfvWM0BtQMkCi7MEi9ryQhuLueeizEY/47vCpsYbA3P dzPUY65R5pusrTSiHDVbxygMI7bm5SiNSXurgQhUh0XFCkDQf7lxiIGG90MgoxYnxgiD djpIyx1ckZMwQDnAL1gEEGWxaGsIrI+BLz7NpcvVwI5tI7hoXgOSbL2XhVhKx9O8rxnS 7S+8UIJgGRy1ZQpFa8XptGjchKrShR4c41uFuA7GMhDsZIsXeeEVejjjztoZx60TS5Qx Xx9Q== Received: by 10.50.40.193 with SMTP id z1mr458832igk.0.1341507656852; Thu, 05 Jul 2012 10:00:56 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.24.148 with SMTP id v20csp68392ibb; Thu, 5 Jul 2012 10:00:54 -0700 (PDT) Received: by 10.204.148.83 with SMTP id o19mr14041614bkv.96.1341507654322; Thu, 05 Jul 2012 10:00:54 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id im3si8487734bkc.119.2012.07.05.10.00.53 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 05 Jul 2012 10:00:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SmpQC-0005ly-VQ; Thu, 05 Jul 2012 18:00:52 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Peter Crosthwaite Subject: [PATCH 6/6] hw/vexpress.c: Allow >4GB of RAM for Cortex-A15 daughterboard Date: Thu, 5 Jul 2012 18:00:52 +0100 Message-Id: <1341507652-22155-7-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1341507652-22155-1-git-send-email-peter.maydell@linaro.org> References: <1341507652-22155-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQmz+ATlEj0xaknMJM58VpiC9Iy3ecQaygD7JdPt8QUNDKbd4AwyXM8zdR5jKzIjzY2zWzrI Now that we have LPAE support and can handle passing 64 bit RAM sizes to Linux via the device tree, we can lift the restriction in the Versatile Express A15 daughterboard model on not having more than 2GB of RAM. Allow up to 30GB, which is the maximum that can fit in the address map before running into the (unmodelled) aliases of the first 2GB. Signed-off-by: Peter Maydell --- hw/vexpress.c | 13 ++++++++++--- 1 files changed, 10 insertions(+), 3 deletions(-) diff --git a/hw/vexpress.c b/hw/vexpress.c index 8072c5a..b2dc8a5 100644 --- a/hw/vexpress.c +++ b/hw/vexpress.c @@ -284,9 +284,16 @@ static void a15_daughterboard_init(const VEDBoardInfo *daughterboard, cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ]; } - if (ram_size > 0x80000000) { - fprintf(stderr, "vexpress-a15: cannot model more than 2GB RAM\n"); - exit(1); + { + /* We have to use a separate 64 bit variable here to avoid the gcc + * "comparison is always false due to limited range of data type" + * warning if we are on a host where ram_addr_t is 32 bits. + */ + uint64_t rsz = ram_size; + if (rsz > (30ULL * 1024 * 1024 * 1024)) { + fprintf(stderr, "vexpress-a15: cannot model more than 30GB RAM\n"); + exit(1); + } } memory_region_init_ram(ram, "vexpress.highmem", ram_size);