From patchwork Thu Jun 28 14:35:59 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 9681 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id EBE5923E1B for ; Thu, 28 Jun 2012 14:36:19 +0000 (UTC) Received: from mail-gh0-f180.google.com (mail-gh0-f180.google.com [209.85.160.180]) by fiordland.canonical.com (Postfix) with ESMTP id BC4A7A1893D for ; Thu, 28 Jun 2012 14:36:19 +0000 (UTC) Received: by mail-gh0-f180.google.com with SMTP id z12so2079635ghb.11 for ; Thu, 28 Jun 2012 07:36:19 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=zZMRkdN+eq6+tb3fsa8h/C6hPewnpTdZOCv5A7H8BCQ=; b=TUYLpHxiwnSxvlojN/HRoVxx5XTrrAvBbeQveOHK3eafL8eWo9fZUv5Vx7SMEIBgc4 fFpkqO0YfZuWdnyll3DMzyKDkeaMxpqqpcyfXwt76DJ78lYYKO9I6VjwlpV16+esfncl wp5b0Vej34+Wq9k+aGrI9C1QbCKqiwB5UZPvpv2cmR0/okH1i0Xpa3B4OlNCAvPKkwHf 3u6dF7wuGpq5Oh2dJaFFbrgojYDM4kk71/gmH1GnBSzhJ2zGj30MJVlp2INPUXCXB3Em J8RGEykYNG60luCn1R3Gg4nk1ic06rlBudbiThqgEN64SC/VqzRivhCMIVf7DwZJ5HJI vYWQ== Received: by 10.50.46.232 with SMTP id y8mr98493igm.57.1340894176296; Thu, 28 Jun 2012 07:36:16 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.24.148 with SMTP id v20csp43440ibb; Thu, 28 Jun 2012 07:36:12 -0700 (PDT) Received: by 10.50.159.227 with SMTP id xf3mr152866igb.24.1340894171952; Thu, 28 Jun 2012 07:36:11 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id tm4si3343430pbc.272.2012.06.28.07.36.10 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 28 Jun 2012 07:36:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SkFpG-0008MS-GF; Thu, 28 Jun 2012 15:36:06 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org Subject: [PATCH 06/13] target-arm: Extend feature flags to 64 bits Date: Thu, 28 Jun 2012 15:35:59 +0100 Message-Id: <1340894166-32105-7-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1340894166-32105-1-git-send-email-peter.maydell@linaro.org> References: <1340894166-32105-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQlolEr0WK4vUA06l0Ie/Xke+gpj62sBNsv+tgTlUW+8mjtH9twgckxd7AmWufZMjoRAnxij Extend feature flags to 64 bits, as we've just run out of space in the 32 bit integer we were using for them. Signed-off-by: Peter Maydell --- target-arm/cpu.c | 2 +- target-arm/cpu.h | 6 +++--- target-arm/machine.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 526e725..b00f5fa 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -129,7 +129,7 @@ static void arm_cpu_reset(CPUState *s) static inline void set_feature(CPUARMState *env, int feature) { - env->features |= 1u << feature; + env->features |= 1ULL << feature; } static void arm_cpu_initfn(Object *obj) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 82cad4b..3c5d2be 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -221,7 +221,7 @@ typedef struct CPUARMState { /* These fields after the common ones so they are preserved on reset. */ /* Internal CPU feature flags. */ - uint32_t features; + uint64_t features; void *nvic; const struct arm_boot_info *boot_info; @@ -392,7 +392,7 @@ enum arm_features { static inline int arm_feature(CPUARMState *env, int feature) { - return (env->features & (1u << feature)) != 0; + return (env->features & (1ULL << feature)) != 0; } void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf); @@ -638,7 +638,7 @@ static inline CPUARMState *cpu_init(const char *cpu_model) #define cpu_signal_handler cpu_arm_signal_handler #define cpu_list arm_cpu_list -#define CPU_SAVE_VERSION 7 +#define CPU_SAVE_VERSION 8 /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _kernel diff --git a/target-arm/machine.c b/target-arm/machine.c index a2a75fb..429cbc8 100644 --- a/target-arm/machine.c +++ b/target-arm/machine.c @@ -60,7 +60,7 @@ void cpu_save(QEMUFile *f, void *opaque) qemu_put_be32(f, env->cp15.c15_diagnostic); qemu_put_be32(f, env->cp15.c15_power_diagnostic); - qemu_put_be32(f, env->features); + qemu_put_be64(f, env->features); if (arm_feature(env, ARM_FEATURE_VFP)) { for (i = 0; i < 16; i++) { @@ -177,7 +177,7 @@ int cpu_load(QEMUFile *f, void *opaque, int version_id) env->cp15.c15_diagnostic = qemu_get_be32(f); env->cp15.c15_power_diagnostic = qemu_get_be32(f); - env->features = qemu_get_be32(f); + env->features = qemu_get_be64(f); if (arm_feature(env, ARM_FEATURE_VFP)) { for (i = 0; i < 16; i++) {