From patchwork Tue May 22 17:02:38 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 8888 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 812A823E49 for ; Tue, 22 May 2012 17:02:45 +0000 (UTC) Received: from mail-yx0-f180.google.com (mail-yx0-f180.google.com [209.85.213.180]) by fiordland.canonical.com (Postfix) with ESMTP id 3FACEA186FC for ; Tue, 22 May 2012 17:02:45 +0000 (UTC) Received: by yenq6 with SMTP id q6so6869815yen.11 for ; Tue, 22 May 2012 10:02:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:x-gm-message-state; bh=P6yzMhooK2daLAMC/vKgS+oCEtN1Pf+H/qnuL44glNY=; b=TZ5USabCCsMXsymc/2V22VH44h7et8prDL01EI05dxH8Pk029SeVPiMVss85DfpcXX M7AC3pzd89UFjYq0hr2V+5i7s7OjlmpZrwWRvlZXggHxoL914qi2maWZxS+AGJvRuOX/ Z4R2zLYKL4PJhvSrLwIbUkv2tz7L6Q4LFO0l5Fl1ham3OGnfcsvr4kUkxxtNd0dVO/P4 lds7ngcLs0U/0sT2QbDeIB1RQ1JeNAa6Hz5dsp0aQvhYdjhBhQEurgqI45Lkij7V/IZj ltg3py5T85nBwgvkJQdPGjisvAcw63Wa4ntxGPD8Mdxf6Jnfe+qXFtrM41kVLzEEbJ/P 9XWw== Received: by 10.50.40.193 with SMTP id z1mr10543093igk.0.1337706164235; Tue, 22 May 2012 10:02:44 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.35.72 with SMTP id o8csp380615ibd; Tue, 22 May 2012 10:02:43 -0700 (PDT) Received: by 10.180.79.166 with SMTP id k6mr36778550wix.8.1337706162585; Tue, 22 May 2012 10:02:42 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id x1si16049482wiy.3.2012.05.22.10.02.40 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 22 May 2012 10:02:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SWsTm-0000xd-8l; Tue, 22 May 2012 18:02:38 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Peter Crosthwaite Subject: [PATCH] hw/cadence_gem: Make rx_desc_addr and tx_desc_addr uint32_t Date: Tue, 22 May 2012 18:02:38 +0100 Message-Id: <1337706158-3670-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 X-Gm-Message-State: ALoCoQldlilkT8RzdBt3TkmaiWS4oPsRKa6R0xAa1GB1Jhwlm7YQd0bnPe+MSmmY7JYjcC5etYw4 Make the state fields rx_desc_addr and tx_desc_addr uint32_t; this matches the VMStateDescription, and also conforms to how hardware works: the registers don't magically become larger if the device is attached to a CPU with a larger physical address size. It also fixes a compile failure if the target_phys_addr_t type is changed to 64 bits. Signed-off-by: Peter Maydell Reviewed-by: Peter A. G. Crosthwaite --- I'm going through fixing problems with moving target-arm to a larger physical address width so we can support the A15 Large Physical Address Extensions... hw/cadence_gem.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/cadence_gem.c b/hw/cadence_gem.c index e2140ae..e563409 100644 --- a/hw/cadence_gem.c +++ b/hw/cadence_gem.c @@ -339,8 +339,8 @@ typedef struct { uint8_t phy_loop; /* Are we in phy loopback? */ /* The current DMA descriptor pointers */ - target_phys_addr_t rx_desc_addr; - target_phys_addr_t tx_desc_addr; + uint32_t rx_desc_addr; + uint32_t tx_desc_addr; } GemState;