From patchwork Tue May 15 16:50:49 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 8659 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 8B48523E1B for ; Tue, 15 May 2012 16:50:55 +0000 (UTC) Received: from mail-gg0-f180.google.com (mail-gg0-f180.google.com [209.85.161.180]) by fiordland.canonical.com (Postfix) with ESMTP id 27A38A18097 for ; Tue, 15 May 2012 16:50:55 +0000 (UTC) Received: by ggnf1 with SMTP id f1so5008393ggn.11 for ; Tue, 15 May 2012 09:50:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:x-gm-message-state; bh=+hr2cqzlsdTJP6TjBz6lWr9oCRE3ehDFgFsnGhIt8CU=; b=VqDuB5GImsvgA6ZdLv2+jvqXVTBtYh03+XFdqQzr8J0QORgjfB+ycRjHUciS28sdG3 QhNKv2vIlUZLlIbBB6uItiqwKztdfnsiyHYxRW57HPyssDtIalKWasrC4Vg3jtooTqrD bMw25OrcGp4TiPVD8kCIUK0yUBMsSUsXD1qsBnegdiVOW/lh8dJrPQ21eyS5Ge0OkZ2B tLSE7u2FfvZJO+TjkyUcA0vYuvXZCNPQDd3ooQdv97nSiUsXUNHE4aF3sac9qHTTlobu W1b0itid/2ER0BSzRO1ttT8DPR8JrF7/ABXKC8q6TstTGSPDJOQ2Q2+RQWKXMCkTZYIk 3WYw== Received: by 10.42.88.135 with SMTP id c7mr6559608icm.57.1337100654475; Tue, 15 May 2012 09:50:54 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.35.72 with SMTP id o8csp433704ibd; Tue, 15 May 2012 09:50:53 -0700 (PDT) Received: by 10.216.196.72 with SMTP id q50mr2057213wen.90.1337100652683; Tue, 15 May 2012 09:50:52 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id w9si478700wek.21.2012.05.15.09.50.51 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 15 May 2012 09:50:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SUKxV-0006Mn-JP; Tue, 15 May 2012 17:50:49 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Andrzej Zaborowski Subject: [PATCH] hw/omap.h: Drop broken MEM_VERBOSE tracing Date: Tue, 15 May 2012 17:50:49 +0100 Message-Id: <1337100649-24450-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 X-Gm-Message-State: ALoCoQkmsT8rajkmhJE6hEOIz3OVQDvohZhlvnMk5wsA91n4qM7P1EP3Wpeazkdrufk0J37Ito18 Remove the MEM_VERBOSE tracing option from omap.h. This worked by intercepting cpu_register_io_memory() calls; it has been broken since cpu_register_io_memory() was removed in favour of the MemoryRegion API. Signed-off-by: Peter Maydell --- The right place to implement this kind of intercepting tracing is in the memory API layer anyway. (I think that would be a cool thing to have, it would let us drop a lot of special purpose tracing currently lurking in the device models, especially if you had some way for the device model to register an offset-to-friendly-register-name mapping...) hw/omap.h | 95 ------------------------------------------------------------- 1 files changed, 0 insertions(+), 95 deletions(-) diff --git a/hw/omap.h b/hw/omap.h index 6c3d004..8a408e8 100644 --- a/hw/omap.h +++ b/hw/omap.h @@ -998,7 +998,6 @@ enum { #define OMAP_GPIOSW_OUTPUT 0x0002 # define TCMI_VERBOSE 1 -//# define MEM_VERBOSE 1 # ifdef TCMI_VERBOSE # define OMAP_8B_REG(paddr) \ @@ -1018,98 +1017,4 @@ enum { # define OMAP_MPUI_REG_MASK 0x000007ff -# ifdef MEM_VERBOSE -struct io_fn { - CPUReadMemoryFunc * const *mem_read; - CPUWriteMemoryFunc * const *mem_write; - void *opaque; - int in; -}; - -static uint32_t io_readb(void *opaque, target_phys_addr_t addr) -{ - struct io_fn *s = opaque; - uint32_t ret; - - s->in ++; - ret = s->mem_read[0](s->opaque, addr); - s->in --; - if (!s->in) - fprintf(stderr, "%08x ---> %02x\n", (uint32_t) addr, ret); - return ret; -} -static uint32_t io_readh(void *opaque, target_phys_addr_t addr) -{ - struct io_fn *s = opaque; - uint32_t ret; - - s->in ++; - ret = s->mem_read[1](s->opaque, addr); - s->in --; - if (!s->in) - fprintf(stderr, "%08x ---> %04x\n", (uint32_t) addr, ret); - return ret; -} -static uint32_t io_readw(void *opaque, target_phys_addr_t addr) -{ - struct io_fn *s = opaque; - uint32_t ret; - - s->in ++; - ret = s->mem_read[2](s->opaque, addr); - s->in --; - if (!s->in) - fprintf(stderr, "%08x ---> %08x\n", (uint32_t) addr, ret); - return ret; -} -static void io_writeb(void *opaque, target_phys_addr_t addr, uint32_t value) -{ - struct io_fn *s = opaque; - - if (!s->in) - fprintf(stderr, "%08x <--- %02x\n", (uint32_t) addr, value); - s->in ++; - s->mem_write[0](s->opaque, addr, value); - s->in --; -} -static void io_writeh(void *opaque, target_phys_addr_t addr, uint32_t value) -{ - struct io_fn *s = opaque; - - if (!s->in) - fprintf(stderr, "%08x <--- %04x\n", (uint32_t) addr, value); - s->in ++; - s->mem_write[1](s->opaque, addr, value); - s->in --; -} -static void io_writew(void *opaque, target_phys_addr_t addr, uint32_t value) -{ - struct io_fn *s = opaque; - - if (!s->in) - fprintf(stderr, "%08x <--- %08x\n", (uint32_t) addr, value); - s->in ++; - s->mem_write[2](s->opaque, addr, value); - s->in --; -} - -static CPUReadMemoryFunc * const io_readfn[] = { io_readb, io_readh, io_readw, }; -static CPUWriteMemoryFunc * const io_writefn[] = { io_writeb, io_writeh, io_writew, }; - -inline static int debug_register_io_memory(CPUReadMemoryFunc * const *mem_read, - CPUWriteMemoryFunc * const *mem_write, - void *opaque) -{ - struct io_fn *s = g_malloc(sizeof(struct io_fn)); - - s->mem_read = mem_read; - s->mem_write = mem_write; - s->opaque = opaque; - s->in = 0; - return cpu_register_io_memory(io_readfn, io_writefn, s, - DEVICE_NATIVE_ENDIAN); -} -# define cpu_register_io_memory debug_register_io_memory -# endif - #endif /* hw_omap_h */