From patchwork Mon May 14 19:03:07 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 8627 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 4BF3323EAB for ; Mon, 14 May 2012 19:27:04 +0000 (UTC) Received: from mail-yw0-f52.google.com (mail-yw0-f52.google.com [209.85.213.52]) by fiordland.canonical.com (Postfix) with ESMTP id 1BA91A18822 for ; Mon, 14 May 2012 19:27:04 +0000 (UTC) Received: by mail-yw0-f52.google.com with SMTP id p61so5835105yhp.11 for ; Mon, 14 May 2012 12:27:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=OeAJqPGkaRbe5lHr7mh9w/ZsW2abr23FDbCr2gj+aUY=; b=PtsBugkWBHp0jZDlzc4rtaIVfQIawXjKf7J65IYAmO2eSqebwiaKvwocS/DTNUVz0R 6XNPzihrvWut3Pqo/Iy4nyV5eB6DvCYzxKhRA5ECg6fsPa8qZuctVot1UZfMDQXqcinW PUjpj5Ozl5YyZSkOdGUYVWsDZlarxdPc5jDP+F1Uwx8RCcw/vj3/GjARRhcV109Xpjw9 93J6+hzhXSPq91wRpRXIvZuzMKZT+iX5zUb8Fq8ub7mduDlBFOFXpkya0hifevbbLd5+ P8h/h2pnelJgafWIRp/6nM+pKrfTY/JQBSFxT8d+j8H0uCeYWe6WeUMYygVYvc3vQ+Aj 71zw== Received: by 10.42.119.129 with SMTP id b1mr4310579icr.48.1337023623743; Mon, 14 May 2012 12:27:03 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.35.72 with SMTP id o8csp367236ibd; Mon, 14 May 2012 12:27:02 -0700 (PDT) Received: by 10.204.129.87 with SMTP id n23mr3464749bks.19.1337023621372; Mon, 14 May 2012 12:27:01 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id gy9si13861510bkc.82.2012.05.14.12.27.00 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 14 May 2012 12:27:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SU0YO-0005n4-PG; Mon, 14 May 2012 20:03:32 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paul Brook , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Rusty Russell Subject: [PATCH qom-next v2 08/33] target-arm: Convert debug registers to cp_reginfo Date: Mon, 14 May 2012 20:03:07 +0100 Message-Id: <1337022212-22219-9-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1337022212-22219-1-git-send-email-peter.maydell@linaro.org> References: <1337022212-22219-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQms2GCsRRxG8XtkuViEt5utCpVCmWAiwhRFp4hOuFMN1qILKF5Nk6HpaQ6cAnMkIJqUPkPm Convert the cp14 debug registers (DBGDIDR, DBGDRAR, DBGDSAR) to the cp_reginfo scheme. Signed-off-by: Peter Maydell --- target-arm/helper.c | 25 +++++++++++++++++++++++++ target-arm/translate.c | 28 ---------------------------- 2 files changed, 25 insertions(+), 28 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index c002050..629095d 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -61,6 +61,27 @@ static int vfp_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg) return 0; } +static const ARMCPRegInfo cp_reginfo[] = { + /* DBGDIDR: just RAZ. In particular this means the "debug architecture + * version" bits will read as a reserved value, which should cause + * Linux to not try to use the debug hardware. + */ + { .name = "DBGDIDR", .cp = 14, .crn = 0, .crm = 0, .opc1 = 0, .opc2 = 0, + .access = PL0_R, .type = ARM_CP_CONST, .resetvalue = 0 }, + REGINFO_SENTINEL +}; + +static const ARMCPRegInfo v7_cp_reginfo[] = { + /* DBGDRAR, DBGDSAR: always RAZ since we don't implement memory mapped + * debug components + */ + { .name = "DBGDRAR", .cp = 14, .crn = 1, .crm = 0, .opc1 = 0, .opc2 = 0, + .access = PL0_R, .type = ARM_CP_CONST, .resetvalue = 0 }, + { .name = "DBGDRAR", .cp = 14, .crn = 2, .crm = 0, .opc1 = 0, .opc2 = 0, + .access = PL0_R, .type = ARM_CP_CONST, .resetvalue = 0 }, + REGINFO_SENTINEL +}; + void register_cp_regs_for_features(ARMCPU *cpu) { /* Register all the coprocessor registers based on feature bits */ @@ -70,6 +91,10 @@ void register_cp_regs_for_features(ARMCPU *cpu) return; } + define_arm_cp_regs(cpu, cp_reginfo); + if (arm_feature(env, ARM_FEATURE_V7)) { + define_arm_cp_regs(cpu, v7_cp_reginfo); + } } ARMCPU *cpu_arm_init(const char *cpu_model) diff --git a/target-arm/translate.c b/target-arm/translate.c index 75e464d..d9fa431 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -6364,34 +6364,6 @@ static int disas_cp14_read(CPUARMState * env, DisasContext *s, uint32_t insn) int rt = (insn >> 12) & 0xf; TCGv tmp; - /* Minimal set of debug registers, since we don't support debug */ - if (op1 == 0 && crn == 0 && op2 == 0) { - switch (crm) { - case 0: - /* DBGDIDR: just RAZ. In particular this means the - * "debug architecture version" bits will read as - * a reserved value, which should cause Linux to - * not try to use the debug hardware. - */ - tmp = tcg_const_i32(0); - store_reg(s, rt, tmp); - return 0; - case 1: - case 2: - /* DBGDRAR and DBGDSAR: v7 only. Always RAZ since we - * don't implement memory mapped debug components - */ - if (ENABLE_ARCH_7) { - tmp = tcg_const_i32(0); - store_reg(s, rt, tmp); - return 0; - } - break; - default: - break; - } - } - if (arm_feature(env, ARM_FEATURE_THUMB2EE)) { if (op1 == 6 && crn == 0 && crm == 0 && op2 == 0) { /* TEECR */