From patchwork Sun Apr 15 13:45:59 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 7866 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 8070B23E4C for ; Sun, 15 Apr 2012 13:57:12 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 44FD2A181F7 for ; Sun, 15 Apr 2012 13:57:12 +0000 (UTC) Received: by mail-iy0-f180.google.com with SMTP id e36so8552637iag.11 for ; Sun, 15 Apr 2012 06:57:12 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=Vy7M+j4xZQ1tjC+oVJcurb+99TsJlgmdEBlVa6d4zRk=; b=AiT+k8tU5Y7nYwAoxNxxeNHJhCAwCJuC5DV9pl0tV4AUYRv8iWuKpMS8oCmUjij3bM OXKWH2VC+KS2Co6+ABMlqlVwSW7WNF2pjRqL2rRUb1W3gec6nWkle1SltkvFRcaqhSku 2AEiyemFTJ6LDahYfHQcQV7vCc5BtY961oXuCkYVG0fDx9GsdI8IZUGyoM9ma+aSoORv ff+iZCQL+KNJ11w/M+LYREdpqxSQI5Otj5lUEWzMGdFrhODVwUT1zgTC+o/Es3q6G3hD QmPENGHJ8V19sB3Y4WwkTeYOMjtfvuHtzvmY5ohlJwM1bQ7ItNEHk+HDD9E23kISdE8h NLQg== Received: by 10.50.242.5 with SMTP id wm5mr3154437igc.40.1334498232062; Sun, 15 Apr 2012 06:57:12 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.70.69 with SMTP id c5csp22617ibj; Sun, 15 Apr 2012 06:57:11 -0700 (PDT) Received: by 10.180.8.231 with SMTP id u7mr10860064wia.9.1334498230368; Sun, 15 Apr 2012 06:57:10 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id l67si15366389weq.38.2012.04.15.06.57.09 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 15 Apr 2012 06:57:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SJPmc-0000Eh-9U; Sun, 15 Apr 2012 14:46:26 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paul Brook Subject: [PATCH 06/32] target-arm: Add register_cp_regs_for_features() Date: Sun, 15 Apr 2012 14:45:59 +0100 Message-Id: <1334497585-867-7-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1334497585-867-1-git-send-email-peter.maydell@linaro.org> References: <1334497585-867-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQmpQTV5yASE1QOOC0IW6o3RMsV126tIFR90Mk/8mtcc2zd2WZaxmZ4AU8+37hAofi4dmHJ7 Add new function register_cp_regs_for_features() as a place to register coprocessor registers dependent on feature flags. Signed-off-by: Peter Maydell --- target-arm/cpu-qom.h | 1 + target-arm/cpu.c | 2 ++ target-arm/helper.c | 11 +++++++++++ 3 files changed, 14 insertions(+), 0 deletions(-) diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index 4abfa90..f8f1e7a 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -105,5 +105,6 @@ static inline ARMCPU *arm_env_get_cpu(CPUARMState *env) #define ENV_GET_CPU(e) CPU(arm_env_get_cpu(e)) void arm_cpu_realize(ARMCPU *cpu); +void register_cp_regs_for_features(ARMCPU *cpu); #endif diff --git a/target-arm/cpu.c b/target-arm/cpu.c index ae55cd0..eca686c 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -210,6 +210,8 @@ void arm_cpu_realize(ARMCPU *cpu) if (arm_feature(env, ARM_FEATURE_VFP3)) { set_feature(env, ARM_FEATURE_VFP); } + + register_cp_regs_for_features(cpu); } /* CPU models */ diff --git a/target-arm/helper.c b/target-arm/helper.c index 60473fc..325fbab 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -61,6 +61,17 @@ static int vfp_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg) return 0; } +void register_cp_regs_for_features(ARMCPU *cpu) +{ + /* Register all the coprocessor registers based on feature bits */ + CPUARMState *env = &cpu->env; + if (arm_feature(env, ARM_FEATURE_M)) { + /* M profile has no coprocessor registers */ + return; + } + +} + CPUARMState *cpu_arm_init(const char *cpu_model) { ARMCPU *cpu;