From patchwork Sun Apr 15 13:46:10 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 7850 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id E574723E47 for ; Sun, 15 Apr 2012 13:46:46 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id AA900A18189 for ; Sun, 15 Apr 2012 13:46:46 +0000 (UTC) Received: by mail-iy0-f180.google.com with SMTP id e36so8543068iag.11 for ; Sun, 15 Apr 2012 06:46:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=n33FkeW2tfMlmSDb3hRJojlAo0rNzSAizAuzDdVLAFM=; b=R/DsAHWLl6VMIVV8Tl2TX7Ri33kDIG5luZ0SbdKlK+s8/TG3V9iDnRvgpHiMCJqJrL etkC0n/XUVQhW7yo44xaC1PFUnrFkKnaaLo7ONhMknvLRf29ppbmN/V6MXnVQwzW/58z cchpx+6gXiSLbaRqGV3YBBRrH+1jo24Y6Q9J2LEAmzt89i+0kpOOe63nnSFEkjzmQxKr GEtxSEtaRpK07+/GFwyORdEybVuwfR7bdCTHchbNGKWV7fw5I+e8WxIT1kOIqfyPj5+n s4ISg2RFL5XqIPC4E7mcVoS8GbE4lx4ZI1Sy/ahQzydhIwNEVv7lNVGlKpz2QvO1PCVV HY8Q== Received: by 10.50.149.163 with SMTP id ub3mr3067069igb.30.1334497606476; Sun, 15 Apr 2012 06:46:46 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.70.69 with SMTP id c5csp22237ibj; Sun, 15 Apr 2012 06:46:46 -0700 (PDT) Received: by 10.180.94.33 with SMTP id cz1mr10903540wib.13.1334497605562; Sun, 15 Apr 2012 06:46:45 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id h5si4811706wih.41.2012.04.15.06.46.44 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 15 Apr 2012 06:46:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SJPmd-0000F3-2s; Sun, 15 Apr 2012 14:46:27 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paul Brook Subject: [PATCH 17/32] target-arm: Convert cp15 crn=10 registers Date: Sun, 15 Apr 2012 14:46:10 +0100 Message-Id: <1334497585-867-18-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1334497585-867-1-git-send-email-peter.maydell@linaro.org> References: <1334497585-867-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQmskNHjJkar3dC+8qPWqcHI97VhDVFAUFFf8QTJH0vXG9ICd3ZPZzwIv9oxuqeaKWQA6YgT We RAZ/WI the entire block of crn=10 registers. Note that this actually covers not just the implementation-defined TLB lockdown registers but also a number of v7 VMSA memory attribute registers which we would need to implement to support TEX remap. We retain the previous QEMU behaviour in this conversion, though. Signed-off-by: Peter Maydell --- target-arm/helper.c | 11 +++++------ 1 files changed, 5 insertions(+), 6 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 29578be..463ae4f 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -111,6 +111,11 @@ static const ARMCPRegInfo cp_reginfo[] = { { .name = "CONTEXTIDR", .cp = 15, .crn = 13, .crm = 0, .opc1 = 0, .opc2 = 1, .access = PL1_RW, .fieldoffset = offsetof(CPUARMState, cp15.c13_fcse), .resetvalue = 0, .writefn = contextidr_write }, + /* ??? This covers not just the impdef TLB lockdown registers but also + * some v7VMSA registers relating to TEX remap, so it is overly broad. + */ + { .name = "TLB_LOCKDOWN", .cp = 15, .crn = 10, .crm = CP_ANY, + .opc1 = CP_ANY, .opc2 = CP_ANY, .access = PL1_RW, .type = ARM_CP_NOP }, REGINFO_SENTINEL }; @@ -1783,9 +1788,6 @@ void HELPER(set_cp15)(CPUARMState *env, uint32_t insn, uint32_t val) goto bad_reg; } break; - case 10: /* MMU TLB lockdown. */ - /* ??? TLB lockdown not implemented. */ - break; case 12: /* Reserved. */ goto bad_reg; case 15: /* Implementation specific. */ @@ -2063,9 +2065,6 @@ uint32_t HELPER(get_cp15)(CPUARMState *env, uint32_t insn) goto bad_reg; } break; - case 10: /* MMU TLB lockdown. */ - /* ??? TLB lockdown not implemented. */ - return 0; case 11: /* TCM DMA control. */ case 12: /* Reserved. */ goto bad_reg;