From patchwork Wed Apr 4 15:30:57 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 7625 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id A912923E5B for ; Wed, 4 Apr 2012 15:31:35 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 69B62A180D2 for ; Wed, 4 Apr 2012 15:31:35 +0000 (UTC) Received: by mail-iy0-f180.google.com with SMTP id e36so623238iag.11 for ; Wed, 04 Apr 2012 08:31:35 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=78A2k7QzBayzwyPNDzhdNZsTccS4LNCGxKVXoV8D9rQ=; b=jmVja2RteS7W10L6b4peI2UBPuPGjD5cnG3arNB/FbYfW3TYo3avxEu9QEe0IYo0If mKvXDAqXn2bq+R6MFGMk/3iBtq3bUfrrCKtDsusLWT04PkBcNaWx2f1ZOZJUOok5bf18 eo6i0z7fGeeHkWHR0fXZM2r9F0RivqPU62+7v3pewRLk2uDo2DWs+YArUPXhtvMMqxjY S8orrn/5CKukZxfbB0gVBWZd0X/e5Rk5ojOgQvFKWwxDtrhh1IQ38hhiJNeaVHHzwEN3 dRyKclqxRRGq6r1gdTEOVS8USaPj9Jw6rEVI/YCIzr96pKEHd+U5vjzlmS1YJzVqk1Bj fu7A== Received: by 10.50.168.67 with SMTP id zu3mr2069087igb.28.1333553495219; Wed, 04 Apr 2012 08:31:35 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.164.217 with SMTP id f25csp45123iby; Wed, 4 Apr 2012 08:31:34 -0700 (PDT) Received: by 10.180.106.9 with SMTP id gq9mr6324534wib.17.1333553493947; Wed, 04 Apr 2012 08:31:33 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id s6si1321048wiz.17.2012.04.04.08.31.33 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 04 Apr 2012 08:31:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SFSAp-0003IU-8S; Wed, 04 Apr 2012 16:31:03 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: Paul Brook , Evgeny Voevodin , patches@linaro.org Subject: [PATCH 08/13] hw/exynos4210_gic.c: Convert to using sysbus GIC Date: Wed, 4 Apr 2012 16:30:57 +0100 Message-Id: <1333553462-12633-9-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1333553462-12633-1-git-send-email-peter.maydell@linaro.org> References: <1333553462-12633-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQkyi/Xeogsen6nhr/7pTpEiV/2OaHW3KJvENJOBPm4a7gXjl22w+gXYOWzOq89mKaTa+X3e Convert the Exynos GIC code to use the standalone sysbus GIC device. Signed-off-by: Peter Maydell Reviewed-by: Evgeny Voevodin --- hw/exynos4210_gic.c | 32 ++++++++++++++++++++++++-------- 1 files changed, 24 insertions(+), 8 deletions(-) diff --git a/hw/exynos4210_gic.c b/hw/exynos4210_gic.c index a05dab2..e1b215e 100644 --- a/hw/exynos4210_gic.c +++ b/hw/exynos4210_gic.c @@ -262,28 +262,44 @@ uint32_t exynos4210_get_irq(uint32_t grp, uint32_t bit) /********* GIC part *********/ -#define LEGACY_INCLUDED_GIC -#include "arm_gic.c" - typedef struct { - gic_state gic; + SysBusDevice busdev; MemoryRegion cpu_container; MemoryRegion dist_container; MemoryRegion cpu_alias[EXYNOS4210_NCPUS]; MemoryRegion dist_alias[EXYNOS4210_NCPUS]; uint32_t num_cpu; + DeviceState *gic; } Exynos4210GicState; +static void exynos4210_gic_set_irq(void *opaque, int irq, int level) +{ + Exynos4210GicState *s = (Exynos4210GicState *)opaque; + qemu_set_irq(qdev_get_gpio_in(s->gic, irq), level); +} + static int exynos4210_gic_init(SysBusDevice *dev) { - Exynos4210GicState *s = FROM_SYSBUSGIC(Exynos4210GicState, dev); + Exynos4210GicState *s = FROM_SYSBUS(Exynos4210GicState, dev); uint32_t i; const char cpu_prefix[] = "exynos4210-gic-alias_cpu"; const char dist_prefix[] = "exynos4210-gic-alias_dist"; char cpu_alias_name[sizeof(cpu_prefix) + 3]; char dist_alias_name[sizeof(cpu_prefix) + 3]; + SysBusDevice *busdev; + + s->gic = qdev_create(NULL, "arm_gic"); + qdev_prop_set_uint32(s->gic, "num-cpu", s->num_cpu); + qdev_prop_set_uint32(s->gic, "num-irq", EXYNOS4210_GIC_NIRQ); + qdev_init_nofail(s->gic); + busdev = sysbus_from_qdev(s->gic); + + /* Pass through outbound IRQ lines from the GIC */ + sysbus_pass_irq(dev, busdev); - gic_init(&s->gic, s->num_cpu, EXYNOS4210_GIC_NIRQ); + /* Pass through inbound GPIO lines to the GIC */ + qdev_init_gpio_in(&s->busdev.qdev, exynos4210_gic_set_irq, + EXYNOS4210_GIC_NIRQ - 32); memory_region_init(&s->cpu_container, "exynos4210-cpu-container", EXYNOS4210_EXT_GIC_CPU_REGION_SIZE); @@ -295,7 +311,7 @@ static int exynos4210_gic_init(SysBusDevice *dev) sprintf(cpu_alias_name, "%s%x", cpu_prefix, i); memory_region_init_alias(&s->cpu_alias[i], cpu_alias_name, - &s->gic.cpuiomem[0], + sysbus_mmio_get_region(busdev, 1), 0, EXYNOS4210_GIC_CPU_REGION_SIZE); memory_region_add_subregion(&s->cpu_container, @@ -305,7 +321,7 @@ static int exynos4210_gic_init(SysBusDevice *dev) sprintf(dist_alias_name, "%s%x", dist_prefix, i); memory_region_init_alias(&s->dist_alias[i], dist_alias_name, - &s->gic.iomem, + sysbus_mmio_get_region(busdev, 0), 0, EXYNOS4210_GIC_DIST_REGION_SIZE); memory_region_add_subregion(&s->dist_container,