From patchwork Wed Apr 4 15:31:00 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 7618 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id C4B5E23E5B for ; Wed, 4 Apr 2012 15:31:11 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 87584A1896A for ; Wed, 4 Apr 2012 15:31:11 +0000 (UTC) Received: by mail-iy0-f180.google.com with SMTP id e36so623238iag.11 for ; Wed, 04 Apr 2012 08:31:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=3AesN6nh4aMqu6KFETu1n/LpCD70g8fETjIy3lQz8p0=; b=GMJN3+mVY5TPCfSD0A0H58lgeAyuzA2iFq/565xKqbL4DHKC790OSoMELNmQEL42/a wT7duhsLyUc5Rakmyx/ZREF6ZqgHB9muPGu4q/QMRqZo/uCDq9rJcCJCNEn0ZFqonrGH VHt9dNIP3qlWVOjqdieeW8I9t12HlAt4IHU/NqiHC18TkHh3bQtSXF+7OJH68nxmKAfz scgnCDjgtrTloiSEBQHv/5zAaNUj31ZZQV8oEWThMkUC/XpucDmT8s8KooQoGWHsQfp3 tB5uiGvPcHPZplgXzwP/zXx1RUjEGPPJKvNtD4eadmf3yHJ0+n701yqaagNujM8d4dmj Xa2g== Received: by 10.42.203.148 with SMTP id fi20mr10200955icb.10.1333553471298; Wed, 04 Apr 2012 08:31:11 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.164.217 with SMTP id f25csp45098iby; Wed, 4 Apr 2012 08:31:08 -0700 (PDT) Received: by 10.204.154.3 with SMTP id m3mr2803101bkw.103.1333553467079; Wed, 04 Apr 2012 08:31:07 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id ty10si433001bkb.131.2012.04.04.08.31.06 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 04 Apr 2012 08:31:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SFSAp-0003Ia-GH; Wed, 04 Apr 2012 16:31:03 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: Paul Brook , Evgeny Voevodin , patches@linaro.org Subject: [PATCH 11/13] hw/arm_gic.c: Use NVIC instead of LEGACY_INCLUDED_GIC define Date: Wed, 4 Apr 2012 16:31:00 +0100 Message-Id: <1333553462-12633-12-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1333553462-12633-1-git-send-email-peter.maydell@linaro.org> References: <1333553462-12633-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQk7BKpUObcMtcN3i7nlJN7WMGNYRbsfxZr7fxZEq5inbo9uiT35n0gKAq0tHWKmpsbf90XC Now all the A profile cores have been switched to use the standalone sysbus GIC, the only remaining code which #includes arm_gic.c is the v7M NVIC. The coupling is much closer here so it's not so easily disentangled. For now, add a comment about how arm_gic.c is compiled, and assume that the NVIC always includes arm_gic.c and the non-NVIC GIC is always compiled standalone. Signed-off-by: Peter Maydell --- hw/arm_gic.c | 13 ++++++++++--- hw/armv7m_nvic.c | 1 - 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/hw/arm_gic.c b/hw/arm_gic.c index e913fc5..a9da88a 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -8,8 +8,15 @@ */ /* This file contains implementation code for the RealView EB interrupt - controller, MPCore distributed interrupt controller and ARMv7-M - Nested Vectored Interrupt Controller. */ + * controller, MPCore distributed interrupt controller and ARMv7-M + * Nested Vectored Interrupt Controller. + * It is compiled in two ways: + * (1) as a standalone file to produce a sysbus device which is a GIC + * that can be used on the realview board and as one of the builtin + * private peripherals for the ARM MP CPUs (11MPCore, A9, etc) + * (2) by being directly #included into armv7m_nvic.c to produce the + * armv7m_nvic device. + */ #include "sysbus.h" @@ -909,7 +916,7 @@ static void gic_init(gic_state *s, int num_irq) register_savevm(NULL, "arm_gic", -1, 2, gic_save, gic_load, s); } -#ifndef LEGACY_INCLUDED_GIC +#ifndef NVIC static int arm_gic_init(SysBusDevice *dev) { diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c index 5cfa971..986a6bb 100644 --- a/hw/armv7m_nvic.c +++ b/hw/armv7m_nvic.c @@ -16,7 +16,6 @@ #include "exec-memory.h" #define NVIC 1 -#define LEGACY_INCLUDED_GIC static uint32_t nvic_readl(void *opaque, uint32_t offset); static void nvic_writel(void *opaque, uint32_t offset, uint32_t value);