From patchwork Wed Apr 4 15:30:59 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 7621 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 2E1E823E5B for ; Wed, 4 Apr 2012 15:31:15 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id E39EBA1896A for ; Wed, 4 Apr 2012 15:31:14 +0000 (UTC) Received: by mail-iy0-f180.google.com with SMTP id e36so623238iag.11 for ; Wed, 04 Apr 2012 08:31:14 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=EIrt3jzp4jRlVCX1eBy47SsfJ0o+1ztqennxmjW4Wsk=; b=VBw1xO9jJMaTajAon9muIhaU5pIEyPfE/te7y56AAe4zfYsiITsoFA3k9RB/Ydy5pl EbWIlHff74PvOjnZYZ7cernB4ytb++EDHBRZtBWApI6QD+xJz8CnUAWnHYklp4MsU2Yv noKEkzKbHmy2BWQpwc7q20YbbcV4VmleW0I7jEaUUwLaYG+YGNvQVTPMwnDf4u3VVon3 lY/rwQ2hji4nnAr3E2upwsmLta0kfvknall6Ug3UDRCSPvcuPccqslWkoLzYgoGB3Kzh S5t/qOUMGKNf6CTAsBle3Ta2E2QdhOkSJoWKcYxuGCtW4NS4696AI/8ATuo3PXP7Eibi fTug== Received: by 10.50.173.35 with SMTP id bh3mr2052602igc.38.1333553474107; Wed, 04 Apr 2012 08:31:14 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.164.217 with SMTP id f25csp45105iby; Wed, 4 Apr 2012 08:31:12 -0700 (PDT) Received: by 10.180.88.67 with SMTP id be3mr6272699wib.20.1333553470626; Wed, 04 Apr 2012 08:31:10 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id x7si2574591wif.23.2012.04.04.08.31.09 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 04 Apr 2012 08:31:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1SFSAp-0003IY-EI; Wed, 04 Apr 2012 16:31:03 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: Paul Brook , Evgeny Voevodin , patches@linaro.org Subject: [PATCH 10/13] hw/arm_gic: Make gic_reset a sysbus reset function Date: Wed, 4 Apr 2012 16:30:59 +0100 Message-Id: <1333553462-12633-11-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1333553462-12633-1-git-send-email-peter.maydell@linaro.org> References: <1333553462-12633-1-git-send-email-peter.maydell@linaro.org> X-Gm-Message-State: ALoCoQkirjhZ+QJfk9z5GE4rhSzuKCLEK5Ucgqf6YwVqVr39GD1VJqD4xeVYbJBcms2oRaLYl0jD Make gic_reset a sysbus reset function, so we actually reset the GIC on system reset rather than only at init. For the NVIC this requires us also to implement reset of the SysTick. Signed-off-by: Peter Maydell --- hw/arm_gic.c | 5 +++-- hw/armv7m_nvic.c | 16 ++++++++++++++++ 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/hw/arm_gic.c b/hw/arm_gic.c index b0b6ec5..e913fc5 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -741,8 +741,9 @@ static const MemoryRegionOps gic_cpu_ops = { }; #endif -static void gic_reset(gic_state *s) +static void gic_reset(DeviceState *dev) { + gic_state *s = FROM_SYSBUS(gic_state, sysbus_from_qdev(dev)); int i; memset(s->irq_state, 0, GIC_MAXIRQ * sizeof(gic_irq_state)); for (i = 0 ; i < NUM_CPU(s); i++) { @@ -905,7 +906,6 @@ static void gic_init(gic_state *s, int num_irq) } #endif - gic_reset(s); register_savevm(NULL, "arm_gic", -1, 2, gic_save, gic_load, s); } @@ -937,6 +937,7 @@ static void arm_gic_class_init(ObjectClass *klass, void *data) SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass); sbc->init = arm_gic_init; dc->props = arm_gic_properties; + dc->reset = gic_reset; dc->no_user = 1; } diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c index 79cf448..5cfa971 100644 --- a/hw/armv7m_nvic.c +++ b/hw/armv7m_nvic.c @@ -76,6 +76,14 @@ static void systick_timer_tick(void * opaque) } } +static void systick_reset(nvic_state *s) +{ + s->systick.control = 0; + s->systick.reload = 0; + s->systick.tick = 0; + qemu_del_timer(s->systick.timer); +} + /* The external routines use the hardware vector numbering, ie. the first IRQ is #16. The internal GIC routines use #32 as the first IRQ. */ void armv7m_nvic_set_pending(void *opaque, int irq) @@ -371,6 +379,13 @@ static const VMStateDescription vmstate_nvic = { } }; +static void armv7m_nvic_reset(DeviceState *dev) +{ + nvic_state *s = FROM_SYSBUSGIC(nvic_state, sysbus_from_qdev(dev)); + gic_reset(&s->gic.busdev.qdev); + systick_reset(s); +} + static int armv7m_nvic_init(SysBusDevice *dev) { nvic_state *s= FROM_SYSBUSGIC(nvic_state, dev); @@ -400,6 +415,7 @@ static void armv7m_nvic_class_init(ObjectClass *klass, void *data) sdc->init = armv7m_nvic_init; dc->vmsd = &vmstate_nvic; + dc->reset = armv7m_nvic_reset; dc->props = armv7m_nvic_properties; }