From patchwork Tue Mar 13 14:45:08 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 7263 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id D5A1323E00 for ; Tue, 13 Mar 2012 14:45:15 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id 76456A18686 for ; Tue, 13 Mar 2012 14:45:15 +0000 (UTC) Received: by iage36 with SMTP id e36so1168271iag.11 for ; Tue, 13 Mar 2012 07:45:14 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:x-gm-message-state; bh=LvtVxcr0cTTk9ZmCdQvJwkgs9v6yt/XZB22qpqxce9w=; b=FO2jggiHa0pOrjmUrzhu7jzLtL4jVgCLEtBXGyjHSOLcI003tt1P+EvqCmEBajnk41 nvfXqEnsX2dC1AfbNb2ZUNqadJn8G1AwHYD3wkMtR8WvxNu4aVDa48WkV9Akh2cMFVVj SBbO3J6aBdbMned+bucNVxcqBfqcj83Q/STjcD++4o+e3EqvES3mXesxtcoHT6MCGW7s 8F9BVJ0I0ZOY3ApOoDHz3mzBIXSauEi3oUgC2ZJcsKxVpi6S0XyQ4vQz6viYuJeayuDJ MhiHUXuBCOS+icSSfqcKZyFA7eKFKwiaDm0OqfIdz3LgMmcvUoOMQSRL22sZaScby6Lh ttDw== Received: by 10.50.158.133 with SMTP id wu5mr5191954igb.50.1331649914853; Tue, 13 Mar 2012 07:45:14 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.53.18 with SMTP id k18csp66843ibg; Tue, 13 Mar 2012 07:45:13 -0700 (PDT) Received: by 10.180.24.4 with SMTP id q4mr8122978wif.7.1331649912956; Tue, 13 Mar 2012 07:45:12 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id y8si19751219wiy.13.2012.03.13.07.45.12 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 13 Mar 2012 07:45:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1S7SyK-0001Pp-7Y; Tue, 13 Mar 2012 14:45:08 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Paul Brook , Daniel Forsgren Subject: [PATCH] target-arm: Decode SETEND correctly in Thumb Date: Tue, 13 Mar 2012 14:45:08 +0000 Message-Id: <1331649908-5418-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 X-Gm-Message-State: ALoCoQkNgMs+YV6pSeIQG4AdvhK3LDwTt9NPf9DJFOcJsy6gkN0uz3aHwDd9k8tz9AMQS3xX+Sjz Decode the SETEND instruction correctly in Thumb mode, rather than accidentally treating it like CPS. We don't support BE8 mode, but this change brings the Thumb mode in to line with behaviour in ARM mode: 'SETEND BE' is not supported and will provoke an UNDEF exception, but 'SETEND LE' is correctly handled as a no-op. Signed-off-by: Peter Maydell Reported-by: Daniel Forsgren Reviewed-by: Laurent Desnogues --- This is one of those patches where I wasn't sure whether to try to split it into a whitespace-only part and a significant-change part. Most of this is (a) indenting existing code another notch for the extra switch statement and (b) adding braces to placate checkpatch. target-arm/translate.c | 63 ++++++++++++++++++++++++++++++----------------- 1 files changed, 40 insertions(+), 23 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 280bfca..3196619 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -9704,32 +9704,49 @@ static void disas_thumb_insn(CPUState *env, DisasContext *s) store_reg(s, rd, tmp); break; - case 6: /* cps */ - ARCH(6); - if (IS_USER(s)) + case 6: + switch ((insn >> 5) & 7) { + case 2: + /* setend */ + ARCH(6); + if (insn & (1 << 3)) { + /* BE8 mode not implemented. */ + goto illegal_op; + } break; - if (IS_M(env)) { - tmp = tcg_const_i32((insn & (1 << 4)) != 0); - /* FAULTMASK */ - if (insn & 1) { - addr = tcg_const_i32(19); - gen_helper_v7m_msr(cpu_env, addr, tmp); - tcg_temp_free_i32(addr); + case 3: + /* cps */ + ARCH(6); + if (IS_USER(s)) { + break; } - /* PRIMASK */ - if (insn & 2) { - addr = tcg_const_i32(16); - gen_helper_v7m_msr(cpu_env, addr, tmp); - tcg_temp_free_i32(addr); + if (IS_M(env)) { + tmp = tcg_const_i32((insn & (1 << 4)) != 0); + /* FAULTMASK */ + if (insn & 1) { + addr = tcg_const_i32(19); + gen_helper_v7m_msr(cpu_env, addr, tmp); + tcg_temp_free_i32(addr); + } + /* PRIMASK */ + if (insn & 2) { + addr = tcg_const_i32(16); + gen_helper_v7m_msr(cpu_env, addr, tmp); + tcg_temp_free_i32(addr); + } + tcg_temp_free_i32(tmp); + gen_lookup_tb(s); + } else { + if (insn & (1 << 4)) { + shift = CPSR_A | CPSR_I | CPSR_F; + } else { + shift = 0; + } + gen_set_psr_im(s, ((insn & 7) << 6), 0, shift); } - tcg_temp_free_i32(tmp); - gen_lookup_tb(s); - } else { - if (insn & (1 << 4)) - shift = CPSR_A | CPSR_I | CPSR_F; - else - shift = 0; - gen_set_psr_im(s, ((insn & 7) << 6), 0, shift); + break; + default: + goto undef; } break;