From patchwork Fri Jan 13 20:52:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 6206 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id C761523F7F for ; Fri, 13 Jan 2012 20:52:54 +0000 (UTC) Received: from mail-bk0-f52.google.com (mail-bk0-f52.google.com [209.85.214.52]) by fiordland.canonical.com (Postfix) with ESMTP id B783EA18125 for ; Fri, 13 Jan 2012 20:52:54 +0000 (UTC) Received: by mail-bk0-f52.google.com with SMTP id zu5so3282064bkb.11 for ; Fri, 13 Jan 2012 12:52:54 -0800 (PST) Received: by 10.204.41.143 with SMTP id o15mr1103246bke.63.1326487974541; Fri, 13 Jan 2012 12:52:54 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.205.82.144 with SMTP id ac16cs38954bkc; Fri, 13 Jan 2012 12:52:54 -0800 (PST) Received: by 10.205.133.129 with SMTP id hy1mr1130498bkc.28.1326487972570; Fri, 13 Jan 2012 12:52:52 -0800 (PST) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id rg8si5449496bkb.108.2012.01.13.12.52.51 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 13 Jan 2012 12:52:52 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1Rlo7F-0003FX-AU; Fri, 13 Jan 2012 20:52:49 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, android-virt@lists.cs.columbia.edu Subject: [PATCH 03/12] hw/arm_boot.c: Make SMP boards specify address to poll in bootup loop Date: Fri, 13 Jan 2012 20:52:40 +0000 Message-Id: <1326487969-12462-4-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1326487969-12462-1-git-send-email-peter.maydell@linaro.org> References: <1326487969-12462-1-git-send-email-peter.maydell@linaro.org> From: Evgeny Voevodin The secondary CPU bootloader in arm_boot.c holds secondary CPUs in a pen until the primary CPU releases them. Make boards specify the address to be polled to determine whether to leave the pen (it was previously hardcoded to 0x10000030, which is a Versatile Express/ Realview specific system register address). Signed-off-by: Evgeny Voevodin Signed-off-by: Peter Maydell --- hw/arm-misc.h | 1 + hw/arm_boot.c | 18 ++++++++++-------- hw/realview.c | 2 ++ hw/vexpress.c | 2 ++ 4 files changed, 15 insertions(+), 8 deletions(-) diff --git a/hw/arm-misc.h b/hw/arm-misc.h index af403a1..6e8ae6b 100644 --- a/hw/arm-misc.h +++ b/hw/arm-misc.h @@ -31,6 +31,7 @@ struct arm_boot_info { const char *initrd_filename; target_phys_addr_t loader_start; target_phys_addr_t smp_loader_start; + target_phys_addr_t smp_bootreg_addr; target_phys_addr_t smp_priv_base; int nb_cpus; int board_id; diff --git a/hw/arm_boot.c b/hw/arm_boot.c index 215d5de..bf509a8 100644 --- a/hw/arm_boot.c +++ b/hw/arm_boot.c @@ -31,17 +31,17 @@ static uint32_t bootloader[] = { /* Entry point for secondary CPUs. Enable interrupt controller and Issue WFI until start address is written to system controller. */ static uint32_t smpboot[] = { - 0xe59f0020, /* ldr r0, privbase */ - 0xe3a01001, /* mov r1, #1 */ - 0xe5801100, /* str r1, [r0, #0x100] */ - 0xe3a00201, /* mov r0, #0x10000000 */ - 0xe3800030, /* orr r0, #0x30 */ + 0xe59f201c, /* ldr r2, privbase */ + 0xe59f001c, /* ldr r0, startaddr */ + 0xe3a01001, /* mov r1, #1 */ + 0xe5821100, /* str r1, [r2, #256] */ 0xe320f003, /* wfi */ 0xe5901000, /* ldr r1, [r0] */ 0xe1110001, /* tst r1, r1 */ 0x0afffffb, /* beq */ 0xe12fff11, /* bx r1 */ - 0 /* privbase: Private memory region base address. */ + 0, /* privbase: Private memory region base address. */ + 0 /* bootreg: Boot register address is held here */ }; #define WRITE_WORD(p, value) do { \ @@ -197,6 +197,7 @@ static void do_cpu_reset(void *opaque) info->loader_start); } } else { + stl_phys_notdirty(info->smp_bootreg_addr, 0); env->regs[15] = info->smp_loader_start; } } @@ -272,8 +273,9 @@ void arm_load_kernel(CPUState *env, struct arm_boot_info *info) rom_add_blob_fixed("bootloader", bootloader, sizeof(bootloader), info->loader_start); if (info->nb_cpus > 1) { - smpboot[10] = info->smp_priv_base; - for (n = 0; n < sizeof(smpboot) / 4; n++) { + smpboot[ARRAY_SIZE(smpboot) - 1] = info->smp_bootreg_addr; + smpboot[ARRAY_SIZE(smpboot) - 2] = info->smp_priv_base; + for (n = 0; n < ARRAY_SIZE(smpboot); n++) { smpboot[n] = tswap32(smpboot[n]); } rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot), diff --git a/hw/realview.c b/hw/realview.c index e52babc..d2fde44 100644 --- a/hw/realview.c +++ b/hw/realview.c @@ -21,6 +21,7 @@ #include "exec-memory.h" #define SMP_BOOT_ADDR 0xe0000000 +#define SMP_BOOTREG_ADDR 0x10000030 typedef struct { SysBusDevice busdev; @@ -96,6 +97,7 @@ static void realview_register_devices(void) static struct arm_boot_info realview_binfo = { .smp_loader_start = SMP_BOOT_ADDR, + .smp_bootreg_addr = SMP_BOOTREG_ADDR, }; /* The following two lists must be consistent. */ diff --git a/hw/vexpress.c b/hw/vexpress.c index 613be65..64fab45 100644 --- a/hw/vexpress.c +++ b/hw/vexpress.c @@ -31,11 +31,13 @@ #include "exec-memory.h" #define SMP_BOOT_ADDR 0xe0000000 +#define SMP_BOOTREG_ADDR 0x10000030 #define VEXPRESS_BOARD_ID 0x8e0 static struct arm_boot_info vexpress_binfo = { .smp_loader_start = SMP_BOOT_ADDR, + .smp_bootreg_addr = SMP_BOOTREG_ADDR, }; static void vexpress_a9_init(ram_addr_t ram_size,