From patchwork Fri Jan 13 20:52:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 6207 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 39DD423F7F for ; Fri, 13 Jan 2012 20:52:56 +0000 (UTC) Received: from mail-bk0-f52.google.com (mail-bk0-f52.google.com [209.85.214.52]) by fiordland.canonical.com (Postfix) with ESMTP id 1C5F3A18309 for ; Fri, 13 Jan 2012 20:52:56 +0000 (UTC) Received: by mail-bk0-f52.google.com with SMTP id zu5so3282064bkb.11 for ; Fri, 13 Jan 2012 12:52:56 -0800 (PST) Received: by 10.204.38.80 with SMTP id a16mr1055804bke.99.1326487975898; Fri, 13 Jan 2012 12:52:55 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.205.82.144 with SMTP id ac16cs38958bkc; Fri, 13 Jan 2012 12:52:55 -0800 (PST) Received: by 10.236.181.198 with SMTP id l46mr4538232yhm.40.1326487973969; Fri, 13 Jan 2012 12:52:53 -0800 (PST) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id u68si11106098yhl.32.2012.01.13.12.52.52 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 13 Jan 2012 12:52:53 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1Rlo7F-0003Fj-Dy; Fri, 13 Jan 2012 20:52:49 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, android-virt@lists.cs.columbia.edu Subject: [PATCH 09/12] Add dummy implementation of generic timer cp15 registers Date: Fri, 13 Jan 2012 20:52:46 +0000 Message-Id: <1326487969-12462-10-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1326487969-12462-1-git-send-email-peter.maydell@linaro.org> References: <1326487969-12462-1-git-send-email-peter.maydell@linaro.org> Add a dummy implementation of the cp15 registers for the generic timer (found in the Cortex-A15), just sufficient for Linux to decide that it can't use it. This requires at least CNTP_CTL and CNTFRQ to be implemented as RAZ/WI; we RAZ/WI all of c14. Signed-off-by: Peter Maydell --- target-arm/cpu.h | 1 + target-arm/helper.c | 12 ++++++++++-- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 26b4981..d5403ea 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -381,6 +381,7 @@ enum arm_features { ARM_FEATURE_VAPA, /* cp15 VA to PA lookups */ ARM_FEATURE_ARM_DIV, /* divide supported in ARM encoding */ ARM_FEATURE_VFP4, /* VFPv4 (implies that NEON is v2) */ + ARM_FEATURE_GENERICTIMER, }; static inline int arm_feature(CPUARMState *env, int feature) diff --git a/target-arm/helper.c b/target-arm/helper.c index fa42c64..de4a50f 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1757,7 +1757,11 @@ void HELPER(set_cp15)(CPUState *env, uint32_t insn, uint32_t val) goto bad_reg; } break; - case 14: /* Reserved. */ + case 14: /* Generic timer */ + if (arm_feature(env, ARM_FEATURE_GENERICTIMER)) { + /* Dummy implementation: RAZ/WI for all */ + break; + } goto bad_reg; case 15: /* Implementation specific. */ if (arm_feature(env, ARM_FEATURE_XSCALE)) { @@ -2123,7 +2127,11 @@ uint32_t HELPER(get_cp15)(CPUState *env, uint32_t insn) default: goto bad_reg; } - case 14: /* Reserved. */ + case 14: /* Generic timer */ + if (arm_feature(env, ARM_FEATURE_GENERICTIMER)) { + /* Dummy implementation: RAZ/WI for all */ + return 0; + } goto bad_reg; case 15: /* Implementation specific. */ if (arm_feature(env, ARM_FEATURE_XSCALE)) {