From patchwork Wed Nov 9 20:46:35 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 5007 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 217E123E0B for ; Wed, 9 Nov 2011 20:46:41 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id 12365A1816F for ; Wed, 9 Nov 2011 20:46:41 +0000 (UTC) Received: by faan26 with SMTP id n26so2982836faa.11 for ; Wed, 09 Nov 2011 12:46:40 -0800 (PST) Received: by 10.152.109.199 with SMTP id hu7mr2721330lab.16.1320871600800; Wed, 09 Nov 2011 12:46:40 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.10.72 with SMTP id g8cs186595lab; Wed, 9 Nov 2011 12:46:40 -0800 (PST) Received: by 10.216.133.155 with SMTP id q27mr5340577wei.101.1320871598525; Wed, 09 Nov 2011 12:46:38 -0800 (PST) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [81.2.115.146]) by mx.google.com with ESMTPS id h17si3433084wee.27.2011.11.09.12.46.37 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 09 Nov 2011 12:46:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1ROF2Z-0002gd-Jj; Wed, 09 Nov 2011 20:46:35 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Andrzej Zaborowski Subject: [PATCH] hw/pxa2xx.c: Fix handling of R/WC bits in PMCR Date: Wed, 9 Nov 2011 20:46:35 +0000 Message-Id: <1320871595-10304-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 Fix a bug in handling the write-one-to-clear bits in the PMCR which meant that we would always clear the bit even if the value written was a zero. Spotted by Coverity (see bug 887883). Signed-off-by: Peter Maydell --- hw/pxa2xx.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c index bfc28a9..d38b922 100644 --- a/hw/pxa2xx.c +++ b/hw/pxa2xx.c @@ -114,7 +114,9 @@ static void pxa2xx_pm_write(void *opaque, target_phys_addr_t addr, switch (addr) { case PMCR: - s->pm_regs[addr >> 2] &= 0x15 & ~(value & 0x2a); + /* Clear the write-one-to-clear bits... */ + s->pm_regs[addr >> 2] &= ~(value & 0x2a); + /* ...and set the plain r/w bits */ s->pm_regs[addr >> 2] |= value & 0x15; break;