From patchwork Thu Aug 25 20:05:10 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 3696 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 9DB9A23F25 for ; Thu, 25 Aug 2011 20:26:38 +0000 (UTC) Received: from mail-gw0-f52.google.com (mail-gw0-f52.google.com [74.125.83.52]) by fiordland.canonical.com (Postfix) with ESMTP id 6DF90A18120 for ; Thu, 25 Aug 2011 20:26:38 +0000 (UTC) Received: by mail-gw0-f52.google.com with SMTP id 15so2958751gwj.11 for ; Thu, 25 Aug 2011 13:26:38 -0700 (PDT) Received: by 10.150.98.4 with SMTP id v4mr749776ybb.326.1314303998197; Thu, 25 Aug 2011 13:26:38 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.151.27.20 with SMTP id e20cs254133ybj; Thu, 25 Aug 2011 13:26:37 -0700 (PDT) Received: by 10.216.230.36 with SMTP id i36mr1023913weq.103.1314303997241; Thu, 25 Aug 2011 13:26:37 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk [81.2.115.146]) by mx.google.com with ESMTPS id c45si2554586wed.36.2011.08.25.13.26.36 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 25 Aug 2011 13:26:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1QwgAp-0005LZ-NN; Thu, 25 Aug 2011 21:05:11 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Andrzej Zaborowski Subject: [PATCH 16/17] omap: Wire up the DMA request line to the GPMC Date: Thu, 25 Aug 2011 21:05:10 +0100 Message-Id: <1314302711-20498-17-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1314302711-20498-1-git-send-email-peter.maydell@linaro.org> References: <1314302711-20498-1-git-send-email-peter.maydell@linaro.org> Signed-off-by: Peter Maydell --- hw/omap.h | 3 ++- hw/omap2.c | 3 ++- hw/omap_gpmc.c | 5 ++++- 3 files changed, 8 insertions(+), 3 deletions(-) diff --git a/hw/omap.h b/hw/omap.h index 81f5544..d9ab006 100644 --- a/hw/omap.h +++ b/hw/omap.h @@ -119,7 +119,8 @@ void omap_sdrc_reset(struct omap_sdrc_s *s); /* OMAP2 general purpose memory controller */ struct omap_gpmc_s; struct omap_gpmc_s *omap_gpmc_init(struct omap_mpu_state_s *mpu, - target_phys_addr_t base, qemu_irq irq); + target_phys_addr_t base, + qemu_irq irq, qemu_irq drq); void omap_gpmc_reset(struct omap_gpmc_s *s); void omap_gpmc_attach(struct omap_gpmc_s *s, int cs, MemoryRegion *iomem); void omap_gpmc_attach_nand(struct omap_gpmc_s *s, int cs, DeviceState *nand); diff --git a/hw/omap2.c b/hw/omap2.c index 0feb7a5..ca088d9 100644 --- a/hw/omap2.c +++ b/hw/omap2.c @@ -2402,7 +2402,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(unsigned long sdram_size, sysbus_mmio_map(busdev, 4, omap_l4_region_base(ta, 5)); s->sdrc = omap_sdrc_init(0x68009000); - s->gpmc = omap_gpmc_init(s, 0x6800a000, s->irq[0][OMAP_INT_24XX_GPMC_IRQ]); + s->gpmc = omap_gpmc_init(s, 0x6800a000, s->irq[0][OMAP_INT_24XX_GPMC_IRQ], + s->drq[OMAP24XX_DMA_GPMC]); dinfo = drive_get(IF_SD, 0, 0); if (!dinfo) { diff --git a/hw/omap_gpmc.c b/hw/omap_gpmc.c index 158c097..be309fe 100644 --- a/hw/omap_gpmc.c +++ b/hw/omap_gpmc.c @@ -27,6 +27,7 @@ /* General-Purpose Memory Controller */ struct omap_gpmc_s { qemu_irq irq; + qemu_irq drq; MemoryRegion iomem; int accept_256; @@ -564,7 +565,8 @@ static const MemoryRegionOps omap_gpmc_ops = { }; struct omap_gpmc_s *omap_gpmc_init(struct omap_mpu_state_s *mpu, - target_phys_addr_t base, qemu_irq irq) + target_phys_addr_t base, + qemu_irq irq, qemu_irq drq) { int cs; struct omap_gpmc_s *s = (struct omap_gpmc_s *) @@ -574,6 +576,7 @@ struct omap_gpmc_s *omap_gpmc_init(struct omap_mpu_state_s *mpu, memory_region_add_subregion(get_system_memory(), base, &s->iomem); s->irq = irq; + s->drq = drq; s->accept_256 = cpu_is_omap3630(mpu); s->revision = cpu_class_omap3(mpu) ? 0x50 : 0x20; omap_gpmc_reset(s);