From patchwork Fri Jul 15 14:58:21 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 2718 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 3884E24355 for ; Fri, 15 Jul 2011 14:58:36 +0000 (UTC) Received: from mail-qy0-f173.google.com (mail-qy0-f173.google.com [209.85.216.173]) by fiordland.canonical.com (Postfix) with ESMTP id 09960A18799 for ; Fri, 15 Jul 2011 14:58:35 +0000 (UTC) Received: by mail-qy0-f173.google.com with SMTP id 10so540200qyk.11 for ; Fri, 15 Jul 2011 07:58:35 -0700 (PDT) Received: by 10.224.208.73 with SMTP id gb9mr657661qab.62.1310741915818; Fri, 15 Jul 2011 07:58:35 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.229.217.78 with SMTP id hl14cs50439qcb; Fri, 15 Jul 2011 07:58:35 -0700 (PDT) Received: by 10.91.53.16 with SMTP id f16mr1609481agk.137.1310741912917; Fri, 15 Jul 2011 07:58:32 -0700 (PDT) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk [81.2.115.146]) by mx.google.com with ESMTPS id n13si2332840anl.153.2011.07.15.07.58.32 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 15 Jul 2011 07:58:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1QhjqU-0000QZ-Jn; Fri, 15 Jul 2011 15:58:26 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Riku Voipio , =?UTF-8?q?Juha=20Riihim=C3=A4ki?= , andrzej zaborowski , Markus Armbruster Subject: [PATCH 07/12] onenand: Pass BlockDriverState to init function Date: Fri, 15 Jul 2011 15:58:21 +0100 Message-Id: <1310741906-1606-8-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1310741906-1606-1-git-send-email-peter.maydell@linaro.org> References: <1310741906-1606-1-git-send-email-peter.maydell@linaro.org> Pass the BlockDriverState to the onenand init function so it doesn't need to look up the drive itself. Signed-off-by: Peter Maydell --- hw/flash.h | 3 ++- hw/nseries.c | 10 ++++++---- hw/onenand.c | 14 ++++++++------ 3 files changed, 16 insertions(+), 11 deletions(-) diff --git a/hw/flash.h b/hw/flash.h index 43260ce..1aae43d 100644 --- a/hw/flash.h +++ b/hw/flash.h @@ -38,7 +38,8 @@ uint32_t nand_getbuswidth(DeviceState *dev); /* onenand.c */ void onenand_base_update(void *opaque, target_phys_addr_t new); void onenand_base_unmap(void *opaque); -void *onenand_init(uint32_t id, int regshift, qemu_irq irq); +void *onenand_init(BlockDriverState *bdrv, uint32_t id, + int regshift, qemu_irq irq); void *onenand_raw_otp(void *opaque); /* ecc.c */ diff --git a/hw/nseries.c b/hw/nseries.c index 32f2f53..4fef05d 100644 --- a/hw/nseries.c +++ b/hw/nseries.c @@ -31,6 +31,7 @@ #include "hw.h" #include "bt.h" #include "loader.h" +#include "blockdev.h" /* Nokia N8x0 support */ struct n800_s { @@ -163,13 +164,14 @@ static const uint8_t n8x0_cal_bt_id[] = { static void n8x0_nand_setup(struct n800_s *s) { char *otp_region; + DriveInfo *dinfo; + dinfo = drive_get(IF_MTD, 0, 0); /* Either ec40xx or ec48xx are OK for the ID */ + s->nand = onenand_init(dinfo ? dinfo->bdrv : 0, 0xec4800, 1, + qdev_get_gpio_in(s->cpu->gpio, N8X0_ONENAND_GPIO)); omap_gpmc_attach(s->cpu->gpmc, N8X0_ONENAND_CS, 0, onenand_base_update, - onenand_base_unmap, - (s->nand = onenand_init(0xec4800, 1, - qdev_get_gpio_in(s->cpu->gpio, - N8X0_ONENAND_GPIO)))); + onenand_base_unmap, s->nand); otp_region = onenand_raw_otp(s->nand); memcpy(otp_region + 0x000, n8x0_cal_wlan_mac, sizeof(n8x0_cal_wlan_mac)); diff --git a/hw/onenand.c b/hw/onenand.c index 71c1ab4..3a19d7f 100644 --- a/hw/onenand.c +++ b/hw/onenand.c @@ -615,10 +615,10 @@ static CPUWriteMemoryFunc * const onenand_writefn[] = { onenand_write, }; -void *onenand_init(uint32_t id, int regshift, qemu_irq irq) +void *onenand_init(BlockDriverState *bdrv, uint32_t id, + int regshift, qemu_irq irq) { OneNANDState *s = (OneNANDState *) qemu_mallocz(sizeof(*s)); - DriveInfo *dinfo = drive_get(IF_MTD, 0, 0); uint32_t size = 1 << (24 + ((id >> 12) & 7)); void *ram; @@ -632,11 +632,13 @@ void *onenand_init(uint32_t id, int regshift, qemu_irq irq) s->density_mask = (id & (1 << 11)) ? (1 << (6 + ((id >> 12) & 7))) : 0; s->iomemtype = cpu_register_io_memory(onenand_readfn, onenand_writefn, s, DEVICE_NATIVE_ENDIAN); - if (!dinfo) + s->bdrv = bdrv; + if (!s->bdrv) { s->image = memset(qemu_malloc(size + (size >> 5)), - 0xff, size + (size >> 5)); - else - s->bdrv = dinfo->bdrv; + 0xff, size + (size >> 5)); + } else { + s->bdrv_cur = s->bdrv; + } s->otp = memset(qemu_malloc((64 + 2) << PAGE_SHIFT), 0xff, (64 + 2) << PAGE_SHIFT); s->ram = qemu_ram_alloc(NULL, "onenand.ram", 0xc000 << s->shift);