From patchwork Mon Feb 21 10:40:18 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 180 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:40:39 -0000 Delivered-To: patches@linaro.org Received: by 10.146.25.23 with SMTP id 23cs193388yay; Mon, 21 Feb 2011 02:40:23 -0800 (PST) Received: by 10.231.182.10 with SMTP id ca10mr1053516ibb.28.1298284823238; Mon, 21 Feb 2011 02:40:23 -0800 (PST) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk [81.2.115.146]) by mx.google.com with ESMTPS id t20si13659572ibk.86.2011.02.21.02.40.21 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 21 Feb 2011 02:40:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1PrTBi-0004Ih-IO; Mon, 21 Feb 2011 10:40:18 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org Subject: [PATCH v2 2/2] target-arm: Fix shift by immediate and narrow where src, dest overlap Date: Mon, 21 Feb 2011 10:40:18 +0000 Message-Id: <1298284818-16504-3-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1298284818-16504-1-git-send-email-peter.maydell@linaro.org> References: <1298284818-16504-1-git-send-email-peter.maydell@linaro.org> For Neon shifts by immediate and narrow, correctly handle the case where the source registers and the destination registers overlap (the second pass should use the original register contents, not the results of the first pass). This includes a refactoring to pull the size check outside the loop rather than inside, since there is now very little common code between the size == 3 and size != 3 case. Signed-off-by: Peter Maydell --- target-arm/translate.c | 84 +++++++++++++++++++++++++---------------------- 1 files changed, 45 insertions(+), 39 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index fa20e84..c859b40 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -4804,64 +4804,70 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn) shift = shift - (1 << (size + 3)); size++; - switch (size) { - case 1: - imm = (uint16_t)shift; - imm |= imm << 16; - tmp2 = tcg_const_i32(imm); - TCGV_UNUSED_I64(tmp64); - break; - case 2: - imm = (uint32_t)shift; - tmp2 = tcg_const_i32(imm); - TCGV_UNUSED_I64(tmp64); - break; - case 3: + if (size == 3) { tmp64 = tcg_const_i64(shift); TCGV_UNUSED(tmp2); - break; - default: - abort(); - } - - for (pass = 0; pass < 2; pass++) { - if (size == 3) { - neon_load_reg64(cpu_V0, rm + pass); + neon_load_reg64(cpu_V0, rm); + neon_load_reg64(cpu_V1, rm + 1); + for (pass = 0; pass < 2; pass++) { + TCGv_i64 in; + if (pass == 0) { + in = cpu_V0; + } else { + in = cpu_V1; + } if (q) { if (input_unsigned) { - gen_helper_neon_rshl_u64(cpu_V0, cpu_V0, - tmp64); + gen_helper_neon_rshl_u64(cpu_V0, in, tmp64); } else { - gen_helper_neon_rshl_s64(cpu_V0, cpu_V0, - tmp64); + gen_helper_neon_rshl_s64(cpu_V0, in, tmp64); } } else { if (input_unsigned) { - gen_helper_neon_shl_u64(cpu_V0, cpu_V0, - tmp64); + gen_helper_neon_shl_u64(cpu_V0, in, tmp64); } else { - gen_helper_neon_shl_s64(cpu_V0, cpu_V0, - tmp64); + gen_helper_neon_shl_s64(cpu_V0, in, tmp64); } } + tmp = new_tmp(); + gen_neon_narrow_op(op == 8, u, size - 1, tmp, cpu_V0); + neon_store_reg(rd, pass, tmp); + } /* for pass */ + tcg_temp_free_i64(tmp64); + } else { + if (size == 1) { + imm = (uint16_t)shift; + imm |= imm << 16; } else { - tmp = neon_load_reg(rm + pass, 0); + /* size == 2 */ + imm = (uint32_t)shift; + } + tmp2 = tcg_const_i32(imm); + TCGV_UNUSED_I64(tmp64); + tmp4 = neon_load_reg(rm + 1, 0); + tmp5 = neon_load_reg(rm + 1, 1); + for (pass = 0; pass < 2; pass++) { + if (pass == 0) { + tmp = neon_load_reg(rm, 0); + } else { + tmp = tmp4; + } gen_neon_shift_narrow(size, tmp, tmp2, q, input_unsigned); - tmp3 = neon_load_reg(rm + pass, 1); + if (pass == 0) { + tmp3 = neon_load_reg(rm, 1); + } else { + tmp3 = tmp5; + } gen_neon_shift_narrow(size, tmp3, tmp2, q, input_unsigned); tcg_gen_concat_i32_i64(cpu_V0, tmp, tmp3); dead_tmp(tmp); dead_tmp(tmp3); - } - tmp = new_tmp(); - gen_neon_narrow_op(op == 8, u, size - 1, tmp, cpu_V0); - neon_store_reg(rd, pass, tmp); - } /* for pass */ - if (size == 3) { - tcg_temp_free_i64(tmp64); - } else { + tmp = new_tmp(); + gen_neon_narrow_op(op == 8, u, size - 1, tmp, cpu_V0); + neon_store_reg(rd, pass, tmp); + } /* for pass */ tcg_temp_free_i32(tmp2); } } else if (op == 10) {