From patchwork Tue Feb 15 13:44:47 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 146 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:40:20 -0000 Delivered-To: patches@linaro.org Received: by 10.146.83.12 with SMTP id g12cs344778yab; Tue, 15 Feb 2011 05:44:54 -0800 (PST) Received: by 10.103.246.7 with SMTP id y7mr1081642mur.73.1297777493608; Tue, 15 Feb 2011 05:44:53 -0800 (PST) Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk [81.2.115.146]) by mx.google.com with ESMTPS id j7si3313328fax.89.2011.02.15.05.44.52 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 15 Feb 2011 05:44:53 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) client-ip=81.2.115.146; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 81.2.115.146 as permitted sender) smtp.mail=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1PpLD0-0001OW-Hc; Tue, 15 Feb 2011 13:44:50 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Christophe Lyon Subject: [PATCH 07/10] target-arm: fix decoding of Neon 64 bit shifts. Date: Tue, 15 Feb 2011 13:44:47 +0000 Message-Id: <1297777490-5323-8-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1297777490-5323-1-git-send-email-peter.maydell@linaro.org> References: <1297777490-5323-1-git-send-email-peter.maydell@linaro.org> From: Christophe Lyon Fix decoding of 64 bits variants of VSHRN, VRSHRN, VQSHRN, VQSHRUN, VQRSHRN, VQRSHRUN, taking into account whether inputs are unsigned or not. Signed-off-by: Christophe Lyon Reviewed-by: Peter Maydell --- target-arm/translate.c | 45 ++++++++++++++++++++++++++++++--------------- 1 files changed, 30 insertions(+), 15 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index bd26b1b..a02b20f 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -4815,6 +4815,8 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn) } else if (op < 10) { /* Shift by immediate and narrow: VSHRN, VRSHRN, VQSHRN, VQRSHRN. */ + int input_unsigned = (op == 8) ? !u : u; + shift = shift - (1 << (size + 3)); size++; switch (size) { @@ -4841,33 +4843,46 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn) if (size == 3) { neon_load_reg64(cpu_V0, rm + pass); if (q) { - if (u) - gen_helper_neon_rshl_u64(cpu_V0, cpu_V0, tmp64); - else - gen_helper_neon_rshl_s64(cpu_V0, cpu_V0, tmp64); + if (input_unsigned) { + gen_helper_neon_rshl_u64(cpu_V0, cpu_V0, + tmp64); + } else { + gen_helper_neon_rshl_s64(cpu_V0, cpu_V0, + tmp64); + } } else { - if (u) - gen_helper_neon_shl_u64(cpu_V0, cpu_V0, tmp64); - else - gen_helper_neon_shl_s64(cpu_V0, cpu_V0, tmp64); + if (input_unsigned) { + gen_helper_neon_shl_u64(cpu_V0, cpu_V0, + tmp64); + } else { + gen_helper_neon_shl_s64(cpu_V0, cpu_V0, + tmp64); + } } } else { tmp = neon_load_reg(rm + pass, 0); - gen_neon_shift_narrow(size, tmp, tmp2, q, u); + gen_neon_shift_narrow(size, tmp, tmp2, q, + input_unsigned); tmp3 = neon_load_reg(rm + pass, 1); - gen_neon_shift_narrow(size, tmp3, tmp2, q, u); + gen_neon_shift_narrow(size, tmp3, tmp2, q, + input_unsigned); tcg_gen_concat_i32_i64(cpu_V0, tmp, tmp3); dead_tmp(tmp); dead_tmp(tmp3); } tmp = new_tmp(); - if (op == 8 && !u) { - gen_neon_narrow(size - 1, tmp, cpu_V0); + if (op == 8) { + if (u) { /* VQSHRUN / VQRSHRUN */ + gen_neon_unarrow_sats(size - 1, tmp, cpu_V0); + } else { /* VSHRN / VRSHRN */ + gen_neon_narrow(size - 1, tmp, cpu_V0); + } } else { - if (op == 8) - gen_neon_narrow_sats(size - 1, tmp, cpu_V0); - else + if (u) { /* VQSHRN / VQRSHRN */ gen_neon_narrow_satu(size - 1, tmp, cpu_V0); + } else { /* VQSHRN / VQRSHRN */ + gen_neon_narrow_sats(size - 1, tmp, cpu_V0); + } } neon_store_reg(rd, pass, tmp); } /* for pass */