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Show patches with
: Series =
hw/riscv: microchip_pfsoc: Support factory HSS boot out of the box
| Archived =
No
| 10 patches
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------
Nobody
andy.doan@linaro.org
andy.doan@linaro.org
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Series
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Date
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Delegate
State
[v2,10/10] hw/riscv: microchip_pfsoc: Hook the I2C1 controller
hw/riscv: microchip_pfsoc: Support factory HSS boot out of the box
-
-
-
2020-10-28
Bin Meng
Superseded
[v2,09/10] hw/riscv: microchip_pfsoc: Correct DDR memory map
hw/riscv: microchip_pfsoc: Support factory HSS boot out of the box
-
-
-
2020-10-28
Bin Meng
Superseded
[v2,08/10] hw/riscv: microchip_pfsoc: Map the reserved memory at address 0
hw/riscv: microchip_pfsoc: Support factory HSS boot out of the box
-
-
-
2020-10-28
Bin Meng
New
[v2,07/10] hw/riscv: microchip_pfsoc: Connect the SYSREG module
hw/riscv: microchip_pfsoc: Support factory HSS boot out of the box
-
-
-
2020-10-28
Bin Meng
Superseded
[v2,06/10] hw/misc: Add Microchip PolarFire SoC SYSREG module support
hw/riscv: microchip_pfsoc: Support factory HSS boot out of the box
-
-
-
2020-10-28
Bin Meng
Superseded
[v2,05/10] hw/riscv: microchip_pfsoc: Connect the IOSCB module
hw/riscv: microchip_pfsoc: Support factory HSS boot out of the box
-
-
-
2020-10-28
Bin Meng
New
[v2,04/10] hw/misc: Add Microchip PolarFire SoC IOSCB module support
hw/riscv: microchip_pfsoc: Support factory HSS boot out of the box
-
-
-
2020-10-28
Bin Meng
Superseded
[v2,03/10] hw/riscv: microchip_pfsoc: Connect DDR memory controller modules
hw/riscv: microchip_pfsoc: Support factory HSS boot out of the box
-
-
-
2020-10-28
Bin Meng
Superseded
[v2,02/10] hw/misc: Add Microchip PolarFire SoC DDR Memory Controller support
hw/riscv: microchip_pfsoc: Support factory HSS boot out of the box
-
-
-
2020-10-28
Bin Meng
Superseded
[v2,01/10] hw/riscv: microchip_pfsoc: Document where to look at the SoC memory maps
hw/riscv: microchip_pfsoc: Support factory HSS boot out of the box
-
-
-
2020-10-28
Bin Meng
New