Show patches with: Series = None       |    Archived = No       |   15 patches
Patch Series S/W/F Date Submitter Delegate State
[PULL,22/33] target/riscv: Compute mstatus.sd on demand Untitled series #160136 --- 2021-10-22 Alistair Francis New
[PULL,21/33] target/riscv: Use riscv_csrrw_debug for cpu_dump Untitled series #160136 --- 2021-10-22 Alistair Francis New
[PULL,20/33] target/riscv: Use gen_shift*_per_ol for RVB, RVI Untitled series #160136 --- 2021-10-22 Alistair Francis New
[PULL,19/33] target/riscv: Use gen_unary_per_ol for RVB Untitled series #160136 --- 2021-10-22 Alistair Francis New
[PULL,18/33] target/riscv: Adjust trans_rev8_32 for riscv64 Untitled series #160136 --- 2021-10-22 Alistair Francis New
[PULL,17/33] target/riscv: Use gen_arith_per_ol for RVM Untitled series #160136 --- 2021-10-22 Alistair Francis New
[PULL,16/33] target/riscv: Replace DisasContext.w with DisasContext.ol Untitled series #160136 --- 2021-10-22 Alistair Francis New
[PULL,15/33] target/riscv: Replace is_32bit with get_xl/get_xlen Untitled series #160136 --- 2021-10-22 Alistair Francis New
[PULL,14/33] target/riscv: Properly check SEW in amo_op Untitled series #160136 --- 2021-10-22 Alistair Francis New
[PULL,13/33] target/riscv: Use REQUIRE_64BIT in amo_check64 Untitled series #160136 --- 2021-10-22 Alistair Francis New
[PULL,12/33] target/riscv: Add MXL/SXL/UXL to TB_FLAGS Untitled series #160136 --- 2021-10-22 Alistair Francis New
[PULL,11/33] target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl Untitled series #160136 --- 2021-10-22 Alistair Francis New
[PULL,10/33] target/riscv: Split misa.mxl and misa.ext Untitled series #160136 --- 2021-10-22 Alistair Francis New
[PULL,09/33] target/riscv: Create RISCVMXL enumeration Untitled series #160136 --- 2021-10-22 Alistair Francis New
[PULL,08/33] target/riscv: Move cpu_get_tb_cpu_state out of line Untitled series #160136 --- 2021-10-22 Alistair Francis New