Show patches with: Series = target/riscv: Rationalize XLEN and operand length       |    Archived = No       |   13 patches
Patch Series S/W/F Date Submitter Delegate State
[13/13] target/riscv: Use gen_shift*_per_ol for RVB, RVI target/riscv: Rationalize XLEN and operand length --- 2021-10-07 Richard Henderson Superseded
[12/13] target/riscv: Use gen_unary_per_ol for RVB target/riscv: Rationalize XLEN and operand length --- 2021-10-07 Richard Henderson Superseded
[11/13] target/riscv: Adjust trans_rev8_32 for riscv64 target/riscv: Rationalize XLEN and operand length --- 2021-10-07 Richard Henderson Superseded
[10/13] target/riscv: Use gen_arith_per_ol for RVM target/riscv: Rationalize XLEN and operand length --- 2021-10-07 Richard Henderson Superseded
[09/13] target/riscv: Replace DisasContext.w with DisasContext.ol target/riscv: Rationalize XLEN and operand length --- 2021-10-07 Richard Henderson Superseded
[08/13] target/riscv: Replace is_32bit with get_xl/get_xlen target/riscv: Rationalize XLEN and operand length --- 2021-10-07 Richard Henderson Superseded
[07/13] target/riscv: Properly check SEW in amo_op target/riscv: Rationalize XLEN and operand length --- 2021-10-07 Richard Henderson Superseded
[06/13] target/riscv: Use REQUIRE_64BIT in amo_check64 target/riscv: Rationalize XLEN and operand length --- 2021-10-07 Richard Henderson Superseded
[05/13] target/riscv: Add MXL/SXL/UXL to TB_FLAGS target/riscv: Rationalize XLEN and operand length --- 2021-10-07 Richard Henderson New
[04/13] target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl target/riscv: Rationalize XLEN and operand length --- 2021-10-07 Richard Henderson Superseded
[03/13] target/riscv: Split misa.mxl and misa.ext target/riscv: Rationalize XLEN and operand length --- 2021-10-07 Richard Henderson Superseded
[02/13] target/riscv: Create RISCVMXL enumeration target/riscv: Rationalize XLEN and operand length --- 2021-10-07 Richard Henderson Superseded
[01/13] target/riscv: Move cpu_get_tb_cpu_state out of line target/riscv: Rationalize XLEN and operand length --- 2021-10-07 Richard Henderson Superseded