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Show patches with
: Submitter =
Richard Henderson
| State =
Action Required
| Archived =
No
| 5644 patches
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Delegate
------
Nobody
andy.doan@linaro.org
andy.doan@linaro.org
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Patch
Series
S/W/F
Date
Submitter
Delegate
State
[PULL,01/16] util/hexdump: Use a GString for qemu_hexdump_line
[PULL,01/16] util/hexdump: Use a GString for qemu_hexdump_line
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-
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2024-06-05
Richard Henderson
New
[PULL,00/16] sprintf fixes
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2024-06-05
Richard Henderson
New
[PULL,29/38] target/sparc: Implement IMA extension
[PULL,01/38] linux-user: Add ioctl for BLKBSZSET
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2024-06-05
Richard Henderson
New
[PULL,22/38] target/sparc: Implement LDXEFSR
[PULL,01/38] linux-user: Add ioctl for BLKBSZSET
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2024-06-05
Richard Henderson
New
[PULL,16/38] target/sparc: Implement FLCMP
[PULL,01/38] linux-user: Add ioctl for BLKBSZSET
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2024-06-05
Richard Henderson
New
[PULL,15/38] target/sparc: Implement FHADD, FHSUB, FNHADD, FNADD, FNMUL
[PULL,01/38] linux-user: Add ioctl for BLKBSZSET
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2024-06-05
Richard Henderson
New
[PULL,10/38] target/sparc: Implement FMAf extension
[PULL,01/38] linux-user: Add ioctl for BLKBSZSET
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2024-06-05
Richard Henderson
New
[PULL,03/38] target/sparc: Rewrite gen_edge
[PULL,01/38] linux-user: Add ioctl for BLKBSZSET
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2024-06-05
Richard Henderson
New
[PULL,00/38] sparc + linux-user patch queue
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2024-06-05
Richard Henderson
New
[RISU] risugen/arm: Refine prefetch and memory hintspace patterns
[RISU] risugen/arm: Refine prefetch and memory hintspace patterns
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2024-05-29
Richard Henderson
New
[v3,30/33] target/arm: Tidy SQDMULH, SQRDMULH (vector)
target/arm: Convert a64 advsimd to decodetree (part 1b)
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2024-05-28
Richard Henderson
New
[v3,22/33] target/arm: Convert SHSUB, UHSUB to gvec
target/arm: Convert a64 advsimd to decodetree (part 1b)
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2024-05-28
Richard Henderson
New
[v3,20/33] target/arm: Convert SHADD, UHADD to gvec
target/arm: Convert a64 advsimd to decodetree (part 1b)
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-
-
2024-05-28
Richard Henderson
New
[v3,14/33] target/arm: Convert SQRSHL and UQRSHL (register) to gvec
target/arm: Convert a64 advsimd to decodetree (part 1b)
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2024-05-28
Richard Henderson
New
[v3,12/33] target/arm: Convert SQSHL and UQSHL (register) to gvec
target/arm: Convert a64 advsimd to decodetree (part 1b)
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2024-05-28
Richard Henderson
New
[v3,10/33] target/arm: Convert SRSHL and URSHL (register) to gvec
target/arm: Convert a64 advsimd to decodetree (part 1b)
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2024-05-28
Richard Henderson
New
[v3,06/33] target/arm: Inline scalar SQADD, UQADD, SQSUB, UQSUB
target/arm: Convert a64 advsimd to decodetree (part 1b)
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2024-05-28
Richard Henderson
New
[v3,05/33] target/arm: Inline scalar SUQADD and USQADD
target/arm: Convert a64 advsimd to decodetree (part 1b)
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2024-05-28
Richard Henderson
New
[v3,04/33] target/arm: Convert SUQADD and USQADD to gvec
target/arm: Convert a64 advsimd to decodetree (part 1b)
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-
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2024-05-28
Richard Henderson
New
[v3,01/33] target/arm: Diagnose UNPREDICTABLE operands to PLD, PLDW, PLI
target/arm: Convert a64 advsimd to decodetree (part 1b)
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2024-05-28
Richard Henderson
New
[18/18] tcg/loongarch64: Enable v256 with LASX
tcg/loongarch64: Support v64 and v256
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-
-
2024-05-27
Richard Henderson
New
[PULL,28/28] target/i386: Pass host pointer and size to cpu_x86_{xsave, xrstor}
[PULL,01/28] target/i386: Add tcg/access.[ch]
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2024-05-27
Richard Henderson
New
[PULL,27/28] target/i386: Pass host pointer and size to cpu_x86_{fxsave, fxrstor}
[PULL,01/28] target/i386: Add tcg/access.[ch]
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2024-05-27
Richard Henderson
New
[PULL,26/28] target/i386: Pass host pointer and size to cpu_x86_{fsave, frstor}
[PULL,01/28] target/i386: Add tcg/access.[ch]
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2024-05-27
Richard Henderson
New
[PULL,24/28] target/i386: Convert do_xsave to X86Access
[PULL,01/28] target/i386: Add tcg/access.[ch]
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-
2024-05-27
Richard Henderson
New
[PULL,22/28] linux-user/i386: Fix allocation and alignment of fp state
[PULL,01/28] target/i386: Add tcg/access.[ch]
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2024-05-27
Richard Henderson
New
[PULL,20/28] linux-user/i386: Return boolean success from restore_sigcontext
[PULL,01/28] target/i386: Add tcg/access.[ch]
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-
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2024-05-27
Richard Henderson
New
[PULL,13/28] target/i386: Add rbfm argument to cpu_x86_{xsave, xrstor}
[PULL,01/28] target/i386: Add tcg/access.[ch]
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2024-05-27
Richard Henderson
New
[PULL,09/28] tagret/i386: Convert do_fxsave, do_fxrstor to X86Access
[PULL,01/28] target/i386: Add tcg/access.[ch]
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-
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2024-05-27
Richard Henderson
New
[PULL,06/28] target/i386: Convert do_fsave, do_frstor to X86Access
[PULL,01/28] target/i386: Add tcg/access.[ch]
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2024-05-27
Richard Henderson
New
[PULL,01/28] target/i386: Add tcg/access.[ch]
[PULL,01/28] target/i386: Add tcg/access.[ch]
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-
-
2024-05-27
Richard Henderson
New
[PULL,00/28] linux-user patch queue
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2024-05-27
Richard Henderson
New
target/arm: Disable SVE extensions when SVE is disabled
target/arm: Disable SVE extensions when SVE is disabled
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-
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2024-05-26
Richard Henderson
New
[RISU,v2,13/13] sparc64: Add VIS4 instructions
ELF and Sparc64 support
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2024-05-26
Richard Henderson
New
[RISU,v2,12/13] sparc64: Add IMA instructions
ELF and Sparc64 support
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2024-05-26
Richard Henderson
New
[RISU,v2,11/13] sparc64: Add VIS3 instructions
ELF and Sparc64 support
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-
-
2024-05-26
Richard Henderson
New
[RISU,v2,10/13] sparc64: Add VIS2 and FMAF insns
ELF and Sparc64 support
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2024-05-26
Richard Henderson
New
[RISU,v2,09/13] sparc64: Add VIS1 instructions
ELF and Sparc64 support
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2024-05-26
Richard Henderson
New
[RISU,v2,08/13] sparc64: Add a few logical insns
ELF and Sparc64 support
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2024-05-26
Richard Henderson
New
[RISU,v2,07/13] contrib/generate_all: Do not rely on ag
ELF and Sparc64 support
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2024-05-26
Richard Henderson
New
[RISU,v2,06/13] risugen: Add sparc64 support
ELF and Sparc64 support
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2024-05-26
Richard Henderson
New
[RISU,v2,05/13] risugen: Be explicit about print destinations
ELF and Sparc64 support
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-
-
2024-05-26
Richard Henderson
New
[RISU,v2,04/13] risu: Add initial sparc64 support
ELF and Sparc64 support
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-
2024-05-26
Richard Henderson
New
[RISU,v2,03/13] Introduce host_context_t
ELF and Sparc64 support
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-
-
2024-05-26
Richard Henderson
New
[RISU,v2,02/13] Build elf test cases instead of raw binaries
ELF and Sparc64 support
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-
-
2024-05-26
Richard Henderson
New
[RISU,v2,01/13] risu: Allow use of ELF test files
ELF and Sparc64 support
-
-
-
2024-05-26
Richard Henderson
New
[v2,45/67] target/arm: Convert SRSHL, URSHL to decodetree
target/arm: Convert a64 advsimd to decodetree (part 1)
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-
-
2024-05-24
Richard Henderson
New
[v2,43/67] target/arm: Convert SSHL, USHL to decodetree
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,38/67] target/arm: Convert SUQADD and USQADD to gvec
target/arm: Convert a64 advsimd to decodetree (part 1)
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-
-
2024-05-24
Richard Henderson
New
[v2,33/67] target/arm: Convert SMAXP, SMINP, UMAXP, UMINP to decodetree
target/arm: Convert a64 advsimd to decodetree (part 1)
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-
2024-05-24
Richard Henderson
New
[v2,29/67] target/arm: Convert FMAXP, FMINP, FMAXNMP, FMINNMP to decodetree
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,22/67] target/arm: Expand vfp neg and abs inline
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,19/67] target/arm: Convert FADD, FSUB, FDIV, FMUL to decodetree
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,18/67] target/arm: Convert FMULX to decodetree
target/arm: Convert a64 advsimd to decodetree (part 1)
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-
2024-05-24
Richard Henderson
New
[v2,08/67] target/arm: Split out gengvec64.c
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,07/67] target/arm: Split out gengvec.c
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,03/67] target/arm: Reject incorrect operands to PLD, PLDW, PLI
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[v2,01/67] target/arm: Add neoverse-n1 to qemu-arm (DO NOT MERGE)
target/arm: Convert a64 advsimd to decodetree (part 1)
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2024-05-24
Richard Henderson
New
[PULL,4/5] tcg/arm: Support TCG_TARGET_HAS_tst_vec
[PULL,1/5] tcg: Introduce TCG_TARGET_HAS_tst_vec
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2024-05-23
Richard Henderson
New
[PULL,3/5] tcg/aarch64: Support TCG_TARGET_HAS_tst_vec
[PULL,1/5] tcg: Introduce TCG_TARGET_HAS_tst_vec
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-
2024-05-23
Richard Henderson
New
[PULL,0/5] tcg patch queue
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2024-05-23
Richard Henderson
New
[RISU,3/4] risugen/arm: Switch to thumb mode only once
risugen/arm: Convert to use assembly
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2024-05-22
Richard Henderson
New
[RISU,2/4] risugen/arm: Fill general regs with 64-bit random data
risugen/arm: Convert to use assembly
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2024-05-22
Richard Henderson
New
[RISU,1/4] risugen/arm: Convert to use assembly
risugen/arm: Convert to use assembly
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2024-05-22
Richard Henderson
New
[PULL,42/43] target/hppa: Log cpu state at interrupt
[PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line
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2024-05-15
Richard Henderson
New
[PULL,38/43] target/hppa: Implement PSW_X
[PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line
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2024-05-15
Richard Henderson
New
[PULL,32/43] target/hppa: Store full iaoq_f and page offset of iaoq_b in TB
[PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line
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2024-05-15
Richard Henderson
New
[PULL,31/43] linux-user/hppa: Force all code addresses to PRIV_USER
[PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line
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2024-05-15
Richard Henderson
New
[PULL,21/43] target/hppa: Use TCG_COND_TST* in do_log_cond
[PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line
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2024-05-15
Richard Henderson
New
[PULL,14/43] target/hppa: Add space argument to do_ibranch
[PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line
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2024-05-15
Richard Henderson
New
[PULL,11/43] target/hppa: Simplify TB end
[PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line
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2024-05-15
Richard Henderson
New
[PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line
[PULL,01/43] target/hppa: Move cpu_get_tb_cpu_state out of line
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2024-05-15
Richard Henderson
New
[PULL,00/43] target/hppa: Misc improvements
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2024-05-15
Richard Henderson
New
[PULL,23/34] target/hexagon: Use translator_ldl in pkt_crosses_page
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
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2024-05-15
Richard Henderson
New
[PULL,20/34] accel/tcg: Introduce translator_fake_ld
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
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2024-05-15
Richard Henderson
New
[PULL,19/34] disas: Use translator_st to get disassembly data
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
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2024-05-15
Richard Henderson
New
[PULL,18/34] disas: Split disas.c
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
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2024-05-15
Richard Henderson
New
[PULL,17/34] accel/tcg: Return bool from TranslatorOps.disas_log
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
-
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2024-05-15
Richard Henderson
New
[PULL,15/34] plugins: Merge alloc_tcg_plugin_context into plugin_gen_tb_start
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
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2024-05-15
Richard Henderson
New
[PULL,14/34] plugins: Use DisasContextBase for qemu_plugin_tb_vaddr
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
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-
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2024-05-15
Richard Henderson
New
[PULL,13/34] plugins: Use DisasContextBase for qemu_plugin_insn_haddr
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
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-
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2024-05-15
Richard Henderson
New
[PULL,12/34] plugins: Read mem_only directly from TB cflags
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
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-
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2024-05-15
Richard Henderson
New
[PULL,11/34] plugins: Use translator_st for qemu_plugin_insn_data
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
-
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2024-05-15
Richard Henderson
New
[PULL,10/34] accel/tcg: Implement translator_st
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
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-
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2024-05-15
Richard Henderson
New
[PULL,09/34] plugins: Copy memory in qemu_plugin_insn_data
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
-
-
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2024-05-15
Richard Henderson
New
[PULL,08/34] accel/tcg: Record DisasContextBase in tcg_ctx for plugins
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
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-
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2024-05-15
Richard Henderson
New
[PULL,07/34] accel/tcg: Record when translator_fake_ldb is used
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
-
-
-
2024-05-15
Richard Henderson
New
[PULL,06/34] accel/tcg: Record mmio bytes during translation
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
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-
2024-05-15
Richard Henderson
New
[PULL,04/34] accel/tcg: Reorg translator_ld*
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
-
-
-
2024-05-15
Richard Henderson
New
[PULL,03/34] accel/tcg: Pass DisasContextBase to translator_fake_ldb
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
-
-
-
2024-05-15
Richard Henderson
New
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
[PULL,01/34] accel/tcg: Use vaddr in translator_ld*
-
-
-
2024-05-15
Richard Henderson
New
[PULL,00/34] tcg patch queue
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-
-
2024-05-15
Richard Henderson
New
[v2,43/45] target/hppa: Implement PSW_H, PSW_L
target/hppa: Misc improvements
-
-
-
2024-05-13
Richard Henderson
New
[v2,42/45] target/hppa: Implement PSW_T
target/hppa: Misc improvements
-
-
-
2024-05-13
Richard Henderson
New
[16/17] configure: Enable loongarch64
RISU misc updates
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-
-
2024-05-11
Richard Henderson
New
[15/17] risu: Allow use of ELF test files
RISU misc updates
-
-
-
2024-05-11
Richard Henderson
New
[14/17] aarch64: Use bool for sve_{z,p}reg_is_eq
RISU misc updates
-
-
-
2024-05-11
Richard Henderson
New
[13/17] Use bool for reginfo_is_eq
RISU misc updates
-
-
-
2024-05-11
Richard Henderson
New
[12/17] aarch64: Trivial SME test
RISU misc updates
-
-
-
2024-05-11
Richard Henderson
New
[11/17] aarch64: Add support for ZA storage
RISU misc updates
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-
2024-05-11
Richard Henderson
New
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