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Patch Series S/W/F Date Submitter Delegate State
[PULL,06/12] linux-user/sparc: Add more hwcap bits for sparc64 Untitled series #241309 --- 2024-05-06 Mark Cave-Ayland Accepted
[57/57] target/arm: Convert SQDMULH, SQRDMULH to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[56/57] target/arm: Tidy SQDMULH, SQRDMULH (vector) target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[55/57] target/arm: Convert MLA, MLS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[54/57] target/arm: Convert MUL, PMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[53/57] target/arm: Convert SABA, SABD, UABA, UABD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[52/57] target/arm: Convert SMAX, SMIN, UMAX, UMIN to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[51/57] target/arm: Convert SRHADD, URHADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[50/57] target/arm: Convert SRHADD, URHADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[49/57] target/arm: Convert SHSUB, UHSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[48/57] target/arm: Convert SHSUB, UHSUB to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[47/57] target/arm: Convert SHADD, UHADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[46/57] target/arm: Convert SHADD, UHADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[45/57] target/arm: Use TCG_COND_TSTNE in gen_cmtst_{i32,i64} target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[44/57] target/arm: Convert CMGT, CMHI, CMGE, CMHS, CMTST, CMEQ to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[43/57] target/arm: Convert ADD, SUB (vector) to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[42/57] target/arm: Convert SQRSHL, UQRSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[41/57] target/arm: Convert SQRSHL and UQRSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[40/57] target/arm: Convert SQSHL, UQSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[39/57] target/arm: Convert SQSHL and UQSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[38/57] target/arm: Convert SRSHL, URSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[37/57] target/arm: Convert SRSHL and URSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[36/57] target/arm: Convert SSHL, USHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[35/57] target/arm: Convert SUQADD, USQADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[34/57] target/arm: Convert SQADD, SQSUB, UQADD, UQSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[33/57] target/arm: Inline scalar SQADD, UQADD, SQSUB, UQSUB target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[32/57] target/arm: Inline scalar SUQADD and USQADD target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[31/57] target/arm: Convert SUQADD and USQADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[30/57] target/arm: Improve vector UQADD, UQSUB, SQADD, SQSUB target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[29/57] target/arm: Convert disas_simd_3same_logic to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[28/57] target/arm: Convert FMLAL, FMLSL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[27/57] target/arm: Use gvec for neon pmax, pmin target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[26/57] target/arm: Convert SMAXP, SMINP, UMAXP, UMINP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[25/57] target/arm: Use gvec for neon padd target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[24/57] target/arm: Convert ADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[23/57] target/arm: Use gvec for neon faddp, fmaxp, fminp target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[22/57] target/arm: Convert FMAXP, FMINP, FMAXNMP, FMINNMP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[21/57] target/arm: Convert FADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[20/57] target/arm: Convert FRECPS, FRSQRTS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[19/57] target/arm: Convert FABD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[18/57] target/arm: Convert FCMEQ, FCMGE, FCMGT, FACGE, FACGT to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[17/57] target/arm: Convert FMLA, FMLS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[16/57] target/arm: Convert FNMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[15/57] target/arm: Expand vfp neg and abs inline target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[14/57] target/arm: Convert FMAX, FMIN, FMAXNM, FMINNM to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[13/57] target/arm: Convert FADD, FSUB, FDIV, FMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[12/57] target/arm: Convert FMULX to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[11/57] target/arm: Convert Advanced SIMD copy to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[10/57] target/arm: Convert XAR to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[09/57] target/arm: Convert Cryptographic 3-register, imm2 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[08/57] target/arm: Convert Cryptographic 4-register to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[07/57] target/arm: Convert Cryptographic 2-register SHA512 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[06/57] target/arm: Convert Cryptographic 3-register SHA512 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[05/57] target/arm: Convert Cryptographic 2-register SHA to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[04/57] target/arm: Convert Cryptographic 3-register SHA to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[03/57] target/arm: Convert Cryptographic AES to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[02/57] target/arm: Split out gengvec64.c target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[01/57] target/arm: Split out gengvec.c target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[PULL,9/9] target/alpha: Implement CF_PCREL [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson Accepted
[PULL,8/9] target/alpha: Split out gen_pc_disp [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson Accepted
[PULL,7/9] target/alpha: Split out gen_goto_tb [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson Accepted
[PULL,6/9] target/alpha: Simplify gen_bcond_internal() [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson Accepted
[PULL,5/9] target/alpha: Return DISAS_NORETURN once [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson Accepted
[PULL,4/9] target/alpha: Inline DISAS_PC_UPDATED and return DISAS_NORETURN [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson Accepted
[PULL,3/9] target/alpha: Use DISAS_NEXT definition instead of magic '0' value [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson New
[PULL,2/9] target/alpha: Hoist branch shift to initial decode [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson Accepted
[PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson Accepted
[PULL,0/9] target/alpha: Implement CF_PCREL --- 2024-05-04 Richard Henderson New
[PULL,14/14] ui/cocoa.m: Drop old macOS-10.12-and-earlier compat ifdefs [PULL,01/14] accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() --- 2024-05-03 Philippe Mathieu-Daudé New
[PULL,13/14] target/sh4: Rename TCGv variables as manual for SUBV opcode [PULL,01/14] accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() --- 2024-05-03 Philippe Mathieu-Daudé Accepted
[PULL,12/14] target/sh4: Rename TCGv variables as manual for ADDV opcode [PULL,01/14] accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() --- 2024-05-03 Philippe Mathieu-Daudé Accepted
[PULL,11/14] target/sh4: Fix SUBV opcode [PULL,01/14] accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() --- 2024-05-03 Philippe Mathieu-Daudé New
[PULL,10/14] target/sh4: Fix ADDV opcode [PULL,01/14] accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() --- 2024-05-03 Philippe Mathieu-Daudé New
[PULL,09/14] MAINTAINERS: Update my email address [PULL,01/14] accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() --- 2024-05-03 Philippe Mathieu-Daudé Accepted
[PULL,08/14] plugins: Update stale comment [PULL,01/14] accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() --- 2024-05-03 Philippe Mathieu-Daudé Accepted
[PULL,07/14] plugins/api: Only include 'exec/ram_addr.h' with system emulation [PULL,01/14] accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() --- 2024-05-03 Philippe Mathieu-Daudé New
[PULL,06/14] coverity: Update user emulation regexp [PULL,01/14] accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() --- 2024-05-03 Philippe Mathieu-Daudé Accepted
[PULL,05/14] user: Move 'thunk.h' from 'exec/user' to 'user' [PULL,01/14] accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() --- 2024-05-03 Philippe Mathieu-Daudé New
[PULL,04/14] user: Move 'abitypes.h' from 'exec/user' to 'user' [PULL,01/14] accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() --- 2024-05-03 Philippe Mathieu-Daudé New
[PULL,03/14] exec: Include missing license in 'exec/cpu-common.h' [PULL,01/14] accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() --- 2024-05-03 Philippe Mathieu-Daudé New
[PULL,02/14] accel/whpx: Fix NULL dereference in whpx_init_vcpu() [PULL,01/14] accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() --- 2024-05-03 Philippe Mathieu-Daudé Accepted
[PULL,01/14] accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() [PULL,01/14] accel/nvmm: Fix NULL dereference in nvmm_init_vcpu() --- 2024-05-03 Philippe Mathieu-Daudé New
[PULL,00/14] Accel / SH4 / UI patches for 2024-05-03 --- 2024-05-03 Philippe Mathieu-Daudé New
[PULL,10/10] tests/bench: Add bufferiszero-bench [PULL,01/10] util/bufferiszero: Remove SSE4.1 variant --- 2024-05-03 Richard Henderson Accepted
[PULL,09/10] util/bufferiszero: Add simd acceleration for aarch64 [PULL,01/10] util/bufferiszero: Remove SSE4.1 variant --- 2024-05-03 Richard Henderson Accepted
[PULL,08/10] util/bufferiszero: Simplify test_buffer_is_zero_next_accel [PULL,01/10] util/bufferiszero: Remove SSE4.1 variant --- 2024-05-03 Richard Henderson New
[PULL,07/10] util/bufferiszero: Introduce biz_accel_fn typedef [PULL,01/10] util/bufferiszero: Remove SSE4.1 variant --- 2024-05-03 Richard Henderson Accepted
[PULL,06/10] util/bufferiszero: Improve scalar variant [PULL,01/10] util/bufferiszero: Remove SSE4.1 variant --- 2024-05-03 Richard Henderson New
[PULL,05/10] util/bufferiszero: Optimize SSE2 and AVX2 variants [PULL,01/10] util/bufferiszero: Remove SSE4.1 variant --- 2024-05-03 Richard Henderson New
[PULL,04/10] util/bufferiszero: Remove useless prefetches [PULL,01/10] util/bufferiszero: Remove SSE4.1 variant --- 2024-05-03 Richard Henderson Accepted
[PULL,03/10] util/bufferiszero: Reorganize for early test for acceleration [PULL,01/10] util/bufferiszero: Remove SSE4.1 variant --- 2024-05-03 Richard Henderson Accepted
[PULL,02/10] util/bufferiszero: Remove AVX512 variant [PULL,01/10] util/bufferiszero: Remove SSE4.1 variant --- 2024-05-03 Richard Henderson Accepted
[PULL,01/10] util/bufferiszero: Remove SSE4.1 variant [PULL,01/10] util/bufferiszero: Remove SSE4.1 variant --- 2024-05-03 Richard Henderson Accepted
[PULL,00/10] bufferiszero improvements --- 2024-05-03 Richard Henderson New
exec/user: Move 'abitypes.h' from 'exec/user' to 'user' exec/user: Move 'abitypes.h' from 'exec/user' to 'user' --- 2024-05-03 Philippe Mathieu-Daudé Superseded
[v3,5/5] accel/tcg: Always call tcg_flush_jmp_cache() on reset accel/tcg: Call tcg_flush_jmp_cache() again when creating user-mode cpu --- 2024-05-03 Philippe Mathieu-Daudé New
[v3,4/5] accel/tcg: Introduce common tcg_exec_cpu_reset_hold() method accel/tcg: Call tcg_flush_jmp_cache() again when creating user-mode cpu --- 2024-05-03 Philippe Mathieu-Daudé New
[v3,3/5] accel/tcg: Do not define cpu_exec_reset_hold() as stub accel/tcg: Call tcg_flush_jmp_cache() again when creating user-mode cpu --- 2024-05-03 Philippe Mathieu-Daudé New
[v3,2/5] accel/tcg: Move system emulation files under sysemu/ subdirectory accel/tcg: Call tcg_flush_jmp_cache() again when creating user-mode cpu --- 2024-05-03 Philippe Mathieu-Daudé New
[v3,1/5] accel/tcg: Move SoftMMU specific units to softmmu_specific_ss[] accel/tcg: Call tcg_flush_jmp_cache() again when creating user-mode cpu --- 2024-05-03 Philippe Mathieu-Daudé New
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