Show patches with: Submitter = Richard Henderson       |    State = Action Required       |    Archived = No       |   5409 patches
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Patch Series S/W/F Date Submitter Delegate State
[PULL,09/16] cputlb: Move NOTDIRTY handling from I/O path to TLB path tcg patch queue --- 2019-09-25 Richard Henderson New
[PULL,08/16] cputlb: Move ROM handling from I/O path to TLB path tcg patch queue --- 2019-09-25 Richard Henderson New
[PULL,06/16] cputlb: Introduce TLB_BSWAP tcg patch queue --- 2019-09-25 Richard Henderson New
[PULL,02/16] cputlb: Disable __always_inline__ without optimization tcg patch queue --- 2019-09-25 Richard Henderson New
[v4,03/16] qemu/compiler.h: Add optimize_away Move rom and notdirty handling to cputlb --- 2019-09-23 Richard Henderson New
[v3,10/20] cputlb: Introduce TLB_BSWAP Move rom and notdirty handling to cputlb --- 2019-09-22 Richard Henderson New
[v3,09/20] cputlb: Replace switches in load/store_helper with callback Move rom and notdirty handling to cputlb --- 2019-09-22 Richard Henderson New
[v3,07/20] exec: Cache TARGET_PAGE_MASK for TARGET_PAGE_BITS_VARY Move rom and notdirty handling to cputlb --- 2019-09-22 Richard Henderson New
[v3,06/20] exec: Tidy TARGET_PAGE_ALIGN Move rom and notdirty handling to cputlb --- 2019-09-22 Richard Henderson New
[v3,04/20] exec: Restrict TARGET_PAGE_BITS_VARY assert to CONFIG_DEBUG_TCG Move rom and notdirty handling to cputlb --- 2019-09-22 Richard Henderson New
[3/7] target/alpha: Fix SWCR_TRAP_ENABLE_MASK target/alpha: Fix linux-user exception for CVTTQ --- 2019-09-21 Richard Henderson New
[RFC,3/3] cputlb: Remove ATOMIC_MMU_DECLS Move notdirty handling to cputlb --- 2019-09-18 Richard Henderson New
[RFC,2/3] cputlb: Move NOTDIRTY handling from I/O path to TLB path Move notdirty handling to cputlb --- 2019-09-18 Richard Henderson New
[2/3] cputlb: Replace switches in load/store_helper with callback cputlb: Adjust tlb bswap implementation --- 2019-09-11 Richard Henderson New
[1/3] cputlb: Disable __always_inline__ without optimization cputlb: Adjust tlb bswap implementation --- 2019-09-11 Richard Henderson New
[PULL,12/13] target/openrisc: Implement l.adrp target/openrisc updates --- 2019-09-04 Richard Henderson New
[PULL,11/13] target/openrisc: Implement move to/from FPCSR target/openrisc updates --- 2019-09-04 Richard Henderson New
[PULL,10/13] target/openrisc: Implement unordered fp comparisons target/openrisc updates --- 2019-09-04 Richard Henderson New
[PULL,09/13] target/openrisc: Add support for ORFPX64A32 target/openrisc updates --- 2019-09-04 Richard Henderson New
[PULL,08/13] target/openrisc: Check CPUCFG_OF32S for float insns target/openrisc updates --- 2019-09-04 Richard Henderson New
[PULL,06/13] target/openrisc: Add VR2 and AVR special processor registers target/openrisc updates --- 2019-09-04 Richard Henderson New
[PULL,05/13] target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to cpu init target/openrisc updates --- 2019-09-04 Richard Henderson New
[v4,68/69] target/arm: Clean up disas_thumb_insn target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,67/69] target/arm: Convert T16, long branches target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,66/69] target/arm: Convert T16, Unconditional branch target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,65/69] target/arm: Convert T16, load (literal) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,64/69] target/arm: Convert T16, shift immediate target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,63/69] target/arm: Convert T16, Miscellaneous 16-bit instructions target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,62/69] target/arm: Convert T16, Conditional branches, Supervisor call target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,61/69] target/arm: Convert T16, push and pop target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,59/69] target/arm: Convert T16, nop hints target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,58/69] target/arm: Convert T16, Reverse bytes target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,57/69] target/arm: Convert T16, Change processor state target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,56/69] target/arm: Convert T16, extract target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,55/69] target/arm: Convert T16 adjust sp (immediate) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,54/69] target/arm: Convert T16 add, compare, move (two high registers) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,53/69] target/arm: Convert T16 branch and exchange target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,52/69] target/arm: Convert T16 one low register and immediate target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,51/69] target/arm: Convert T16 add/sub (3 low, 2 low and imm) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,50/69] target/arm: Convert T16 load/store multiple target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,49/69] target/arm: Convert T16 add pc/sp (immediate) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,48/69] target/arm: Convert T16 load/store (immediate offset) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,47/69] target/arm: Convert T16 load/store (register offset) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,46/69] target/arm: Convert T16 data-processing (two low regs) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,45/69] target/arm: Add skeleton for T16 decodetree target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,42/69] target/arm: Convert TT target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,41/69] target/arm: Convert SG target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,40/69] target/arm: Convert Table Branch target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,39/69] target/arm: Convert Unallocated memory hint target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,38/69] target/arm: Convert PLI, PLD, PLDW target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,37/69] target/arm: Convert SETEND target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,36/69] target/arm: Convert CPS (privileged) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,35/69] target/arm: Convert Clear-Exclusive, Barriers target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,34/69] target/arm: Convert RFE and SRS target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,33/69] target/arm: Convert SVC target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,32/69] target/arm: Convert B, BL, BLX (immediate) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,30/69] target/arm: Diagnose too few registers in list for LDM/STM target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,28/69] target/arm: Convert LDM, STM target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,27/69] target/arm: Convert MOVW, MOVT target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,26/69] target/arm: Convert Signed multiply, signed and unsigned divide target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,25/69] target/arm: Convert packing, unpacking, saturation, and reversal target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,24/69] target/arm: Convert Parallel addition and subtraction target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,23/69] target/arm: Convert USAD8, USADA8, SBFX, UBFX, BFC, BFI, UDF target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,21/69] target/arm: Convert Synchronization primitives target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,20/69] target/arm: Convert load/store (register, immediate, literal) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,19/69] target/arm: Convert T32 ADDW/SUBW target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,18/69] target/arm: Convert the rest of A32 Miscelaneous instructions target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,17/69] target/arm: Convert ERET target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,16/69] target/arm: Convert CLZ target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,15/69] target/arm: Convert BX, BXJ, BLX (register) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,14/69] target/arm: Convert Cyclic Redundancy Check target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,13/69] target/arm: Convert MRS/MSR (banked, register) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,12/69] target/arm: Convert MSR (immediate) and hints target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,09/69] target/arm: Convert Halfword multiply and multiply accumulate target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,08/69] target/arm: Convert Saturating addition and subtraction target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,06/69] target/arm: Convert multiply and multiply accumulate target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,05/69] target/arm: Convert Data Processing (immediate) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,04/69] target/arm: Convert Data Processing (reg-shifted-reg) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,03/69] target/arm: Convert Data Processing (register) target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[v4,02/69] target/arm: Add stubs for aa32 decodetree target/arm: Convert aa32 base isa to decodetree --- 2019-09-04 Richard Henderson New
[36/36] tcg: Factor out probe_write() logic into probe_access() tcg patch queue --- 2019-09-03 Richard Henderson New
[35/36] tcg: Make probe_write() return a pointer to the host page tcg patch queue --- 2019-09-03 Richard Henderson New
[30/36] tcg: Factor out CONFIG_USER_ONLY probe_write() from s390x code tcg patch queue --- 2019-09-03 Richard Henderson New
[26/36] cputlb: Handle watchpoints via TLB_WATCHPOINT tcg patch queue --- 2019-09-03 Richard Henderson New
[23/36] exec: Factor out cpu_watchpoint_address_matches tcg patch queue --- 2019-09-03 Richard Henderson New
[22/36] cputlb: Fold TLB_RECHECK into TLB_INVALID_MASK tcg patch queue --- 2019-09-03 Richard Henderson New
[21/36] exec: Factor out core logic of check_watchpoint() tcg patch queue --- 2019-09-03 Richard Henderson New
[20/36] exec: Move user-only watchpoint stubs inline tcg patch queue --- 2019-09-03 Richard Henderson New
[17/36] cputlb: Byte swap memory transaction attribute tcg patch queue --- 2019-09-03 Richard Henderson New
[01/36] tcg: TCGMemOp is now accelerator independent MemOp tcg patch queue --- 2019-09-03 Richard Henderson New
[1/2] Revert "target/arm: Use unallocated_encoding for aarch32" target/arm: Fix aarch64 illegal opcode exceptions --- 2019-08-26 Richard Henderson New
[2/2] linux-user/arm: Adjust MAX_RESERVED_VA for M-profile linux-user/arm: Adjust MAX_RESERVED_VA for M-profile --- 2019-08-22 Richard Henderson New
[v5,16/17] target/arm: Rebuild hflags at EL changes and MSR writes target/arm: Reduce overhead of cpu_get_tb_cpu_state --- 2019-08-20 Richard Henderson New
[v5,13/17] target/arm: Split out arm_mmu_idx_el target/arm: Reduce overhead of cpu_get_tb_cpu_state --- 2019-08-20 Richard Henderson New
[v2,52/68] target/arm: Convert T16 branch and exchange target/arm: Convert aa32 base isa to decodetree --- 2019-08-19 Richard Henderson New
[v2,34/68] target/arm: Convert Clear-Exclusive, Barriers target/arm: Convert aa32 base isa to decodetree --- 2019-08-19 Richard Henderson New
[v2,30/68] target/arm: Diagnose base == pc for LDM/STM target/arm: Convert aa32 base isa to decodetree --- 2019-08-19 Richard Henderson New
[v2,29/68] target/arm: Diagnose too few registers in list for LDM/STM target/arm: Convert aa32 base isa to decodetree --- 2019-08-19 Richard Henderson New
[v2,22/68] target/arm: Convert USAD8, USADA8, SBFX, UBFX, BFC, BFI, UDF target/arm: Convert aa32 base isa to decodetree --- 2019-08-19 Richard Henderson New
[PULL,3/3] target/riscv: Remove redundant declaration pragmas decodetree improvements --- 2019-08-19 Richard Henderson New
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