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Show patches with
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| 15 patches
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andy.doan@linaro.org
andy.doan@linaro.org
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Series
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Date
Submitter
Delegate
State
[PULL,v2,30/32] hw/riscv: sifive_u: Support different boot source per MSEL pin state
Untitled series #59628
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2020-06-19
Alistair Francis
New
[PULL,v2,27/32] hw/riscv: sifive_u: Add a new property msel for MSEL pin state
Untitled series #59628
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2020-06-19
Alistair Francis
New
[PULL,v2,26/32] hw/riscv: sifive_u: Rename serial property get/set functions to a generic name
Untitled series #59628
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2020-06-19
Alistair Francis
Superseded
[PULL,v2,23/32] hw/riscv: sifive_u: Hook a GPIO controller
Untitled series #59628
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2020-06-19
Alistair Francis
New
[PULL,v2,21/32] hw/riscv: sifive_gpio: Clean up the codes
Untitled series #59628
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2020-06-19
Alistair Francis
Superseded
[PULL,v2,20/32] hw/riscv: sifive_u: Generate device tree node for OTP
Untitled series #59628
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2020-06-19
Alistair Francis
New
[PULL,v2,19/32] hw/riscv: sifive_u: Simplify the GEM IRQ connect code a little bit
Untitled series #59628
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2020-06-19
Alistair Francis
New
[PULL,v2,18/32] hw/riscv: opentitan: Remove the riscv_ prefix of the machine* and soc* functions
Untitled series #59628
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2020-06-19
Alistair Francis
Superseded
[PULL,v2,15/32] riscv/opentitan: Connect the UART device
Untitled series #59628
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2020-06-19
Alistair Francis
New
[PULL,v2,14/32] riscv/opentitan: Connect the PLIC device
Untitled series #59628
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2020-06-19
Alistair Francis
New
[PULL,v2,11/32] riscv/opentitan: Fix the ROM size
Untitled series #59628
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2020-06-19
Alistair Francis
Superseded
[PULL,v2,10/32] target/riscv: Implement checks for hfence
Untitled series #59628
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2020-06-19
Alistair Francis
Superseded
[PULL,v2,08/32] target/riscv: Report errors validating 2nd-stage PTEs
Untitled series #59628
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2020-06-19
Alistair Francis
Superseded
[PULL,v2,07/32] target/riscv: Set access as data_load when validating stage-2 PTEs
Untitled series #59628
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2020-06-19
Alistair Francis
Superseded
[PULL,v2,03/32] riscv: Generalize CPU init routine for the base CPU
Untitled series #59628
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2020-06-19
Alistair Francis
Superseded