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hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
| 19 patches
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andy.doan@linaro.org
andy.doan@linaro.org
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[RESEND,v2,19/19] hw/net/xilinx_ethlite: Map RESERVED I/O as unimplemented
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,18/19] hw/net/xilinx_ethlite: Rename 'mmio' MR as 'container'
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,17/19] hw/net/xilinx_ethlite: Map the RAM buffer as RAM memory region
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,16/19] hw/net/xilinx_ethlite: Map TX_CTRL as MMIO
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,15/19] hw/net/xilinx_ethlite: Map TX_GIE as MMIO
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,14/19] hw/net/xilinx_ethlite: Map TX_LEN as MMIO
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,13/19] hw/net/xilinx_ethlite: Map RX_CTRL as MMIO
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,12/19] hw/net/xilinx_ethlite: Access TX_CTRL register for each port
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,11/19] hw/net/xilinx_ethlite: Access TX_LEN register for each port
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,10/19] hw/net/xilinx_ethlite: Access TX_GIE register for each port
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,09/19] hw/net/xilinx_ethlite: Introduce rxbuf_ptr() helper
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,08/19] hw/net/xilinx_ethlite: Introduce txbuf_ptr() helper
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,07/19] hw/net/xilinx_ethlite: Rename rxbuf -> port_index
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,06/19] hw/net/xilinx_ethlite: Map MDIO registers (as unimplemented)
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,05/19] hw/net/xilinx_ethlite: Correct maximum RX buffer size
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,04/19] hw/net/xilinx_ethlite: Update QOM style
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,03/19] hw/net/xilinx_ethlite: Remove unuseful debug logs
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,02/19] hw/net/xilinx_ethlite: Convert some debug logs to trace events
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New
[RESEND,v2,01/19] hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit
hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
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2024-11-14
Philippe Mathieu-Daudé
New