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Patch Series S/W/F Date Submitter Delegate State
[PULL,28/28] MAINTAINERS: Update my email address [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,27/28] MAINTAINERS: Update Aleksandar Rikalo email [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,26/28] softmmu: Pass RAM MemoryRegion and is_write in xen_map_cache() [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé New
[PULL,25/28] xen: mapcache: Break out xen_map_cache_init_single() [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,24/28] xen: mapcache: Break out xen_invalidate_map_cache_single() [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,23/28] xen: mapcache: Refactor xen_invalidate_map_cache_entry_unlocked [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,22/28] xen: mapcache: Refactor xen_replace_cache_entry_unlocked [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,21/28] xen: mapcache: Break out xen_ram_addr_from_mapcache_single [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,20/28] xen: mapcache: Refactor xen_remap_bucket for multi-instance [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,19/28] xen: mapcache: Refactor xen_map_cache for multi-instance [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,18/28] xen: mapcache: Refactor lock functions for multi-instance [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé New
[PULL,17/28] xen: let xen_ram_addr_from_mapcache() return -1 in case of not found entry [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,16/28] softmmu: let qemu_map_ram_ptr() use qemu_ram_ptr_length() [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,15/28] user: Use get_task_state() helper [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,14/28] user: Declare get_task_state() once in 'accel/tcg/vcpu-state.h' [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,13/28] user: Forward declare TaskState type definition [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,12/28] accel/tcg: Move @plugin_mem_cbs from CPUState to CPUNegativeOffsetState [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé New
[PULL,11/28] accel/tcg: Restrict cpu_plugin_mem_cbs_enabled() to TCG [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,10/28] accel/tcg: Restrict qemu_plugin_vcpu_exit_hook() to TCG plugins [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,09/28] accel/tcg: Update CPUNegativeOffsetState::can_do_io field documentation [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,08/28] accel/tcg: Move user definition of cpu_interrupt() to user-exec.c [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,07/28] accel/tcg: Access tcg_cflags with getter / setter [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé New
[PULL,06/28] accel/tcg: Use cpu_loop_exit_requested() in cpu_loop_exec_tb() [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,05/28] exec/cpu: Extract page-protection definitions to page-protection.h [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé New
[PULL,04/28] exec/cpu: Remove duplicated PAGE_PASSTHROUGH definition [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,03/28] exec/cpu: Remove obsolete PAGE_RESERVED definition [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,02/28] exec/cpu: Rename PAGE_BITS macro to PAGE_RWX [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé New
[PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions [PULL,01/28] exec/cpu: Indent TARGET_PAGE_foo definitions --- 2024-05-06 Philippe Mathieu-Daudé Accepted
[PULL,00/28] Accelerator patches for 2024-05-06 --- 2024-05-06 Philippe Mathieu-Daudé New
[PULL,12/12] target/sparc: Split out do_ms16b Untitled series #241309 --- 2024-05-06 Mark Cave-Ayland Accepted
[PULL,11/12] target/sparc: Fix FPMERGE Untitled series #241309 --- 2024-05-06 Mark Cave-Ayland Accepted
[PULL,10/12] target/sparc: Fix FMULD8*X16 Untitled series #241309 --- 2024-05-06 Mark Cave-Ayland Accepted
[PULL,09/12] target/sparc: Fix FMUL8x16A{U,L} Untitled series #241309 --- 2024-05-06 Mark Cave-Ayland Accepted
[PULL,08/12] target/sparc: Fix FMUL8x16 Untitled series #241309 --- 2024-05-06 Mark Cave-Ayland Accepted
[PULL,07/12] target/sparc: Fix FEXPAND Untitled series #241309 --- 2024-05-06 Mark Cave-Ayland Accepted
[PULL,06/12] linux-user/sparc: Add more hwcap bits for sparc64 Untitled series #241309 --- 2024-05-06 Mark Cave-Ayland Accepted
[57/57] target/arm: Convert SQDMULH, SQRDMULH to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[56/57] target/arm: Tidy SQDMULH, SQRDMULH (vector) target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[55/57] target/arm: Convert MLA, MLS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[54/57] target/arm: Convert MUL, PMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[53/57] target/arm: Convert SABA, SABD, UABA, UABD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[52/57] target/arm: Convert SMAX, SMIN, UMAX, UMIN to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[51/57] target/arm: Convert SRHADD, URHADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[50/57] target/arm: Convert SRHADD, URHADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[49/57] target/arm: Convert SHSUB, UHSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[48/57] target/arm: Convert SHSUB, UHSUB to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[47/57] target/arm: Convert SHADD, UHADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[46/57] target/arm: Convert SHADD, UHADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[45/57] target/arm: Use TCG_COND_TSTNE in gen_cmtst_{i32,i64} target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[44/57] target/arm: Convert CMGT, CMHI, CMGE, CMHS, CMTST, CMEQ to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[43/57] target/arm: Convert ADD, SUB (vector) to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[42/57] target/arm: Convert SQRSHL, UQRSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[41/57] target/arm: Convert SQRSHL and UQRSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[40/57] target/arm: Convert SQSHL, UQSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[39/57] target/arm: Convert SQSHL and UQSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[38/57] target/arm: Convert SRSHL, URSHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[37/57] target/arm: Convert SRSHL and URSHL (register) to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[36/57] target/arm: Convert SSHL, USHL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[35/57] target/arm: Convert SUQADD, USQADD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[34/57] target/arm: Convert SQADD, SQSUB, UQADD, UQSUB to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[33/57] target/arm: Inline scalar SQADD, UQADD, SQSUB, UQSUB target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[32/57] target/arm: Inline scalar SUQADD and USQADD target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[31/57] target/arm: Convert SUQADD and USQADD to gvec target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[30/57] target/arm: Improve vector UQADD, UQSUB, SQADD, SQSUB target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[29/57] target/arm: Convert disas_simd_3same_logic to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[28/57] target/arm: Convert FMLAL, FMLSL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[27/57] target/arm: Use gvec for neon pmax, pmin target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[26/57] target/arm: Convert SMAXP, SMINP, UMAXP, UMINP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[25/57] target/arm: Use gvec for neon padd target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[24/57] target/arm: Convert ADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[23/57] target/arm: Use gvec for neon faddp, fmaxp, fminp target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[22/57] target/arm: Convert FMAXP, FMINP, FMAXNMP, FMINNMP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[21/57] target/arm: Convert FADDP to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[20/57] target/arm: Convert FRECPS, FRSQRTS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[19/57] target/arm: Convert FABD to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[18/57] target/arm: Convert FCMEQ, FCMGE, FCMGT, FACGE, FACGT to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[17/57] target/arm: Convert FMLA, FMLS to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[16/57] target/arm: Convert FNMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[15/57] target/arm: Expand vfp neg and abs inline target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[14/57] target/arm: Convert FMAX, FMIN, FMAXNM, FMINNM to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[13/57] target/arm: Convert FADD, FSUB, FDIV, FMUL to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[12/57] target/arm: Convert FMULX to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[11/57] target/arm: Convert Advanced SIMD copy to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[10/57] target/arm: Convert XAR to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[09/57] target/arm: Convert Cryptographic 3-register, imm2 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[08/57] target/arm: Convert Cryptographic 4-register to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[07/57] target/arm: Convert Cryptographic 2-register SHA512 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[06/57] target/arm: Convert Cryptographic 3-register SHA512 to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[05/57] target/arm: Convert Cryptographic 2-register SHA to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[04/57] target/arm: Convert Cryptographic 3-register SHA to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[03/57] target/arm: Convert Cryptographic AES to decodetree target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[02/57] target/arm: Split out gengvec64.c target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[01/57] target/arm: Split out gengvec.c target/arm: Convert a64 advsimd to decodetree (part 1) --- 2024-05-06 Richard Henderson Superseded
[PULL,9/9] target/alpha: Implement CF_PCREL [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson Accepted
[PULL,8/9] target/alpha: Split out gen_pc_disp [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson Accepted
[PULL,7/9] target/alpha: Split out gen_goto_tb [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson Accepted
[PULL,6/9] target/alpha: Simplify gen_bcond_internal() [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson Accepted
[PULL,5/9] target/alpha: Return DISAS_NORETURN once [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson Accepted
[PULL,4/9] target/alpha: Inline DISAS_PC_UPDATED and return DISAS_NORETURN [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson Accepted
[PULL,3/9] target/alpha: Use DISAS_NEXT definition instead of magic '0' value [PULL,1/9] target/alpha: Use cpu_env in preference to ALPHA_CPU --- 2024-05-04 Richard Henderson New
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